Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced its custom/analog tools and full-flow digital and signoff tools have achieved certification for the process design kit (PDK) and foundation library for the Samsung Electronics’ 28nm fully depleted silicon-on-insulator (FDS), also known as FD-SOI, process technology. The Cadence® 28nm FDS reference flow has been certified by Samsung using a quad-core design with the ARM® Cortex®-A53 processor covering forward body bias (FBB) with a bias controller, a power-gating scheme, UPF2.1 compliance, multi-bit FF optimization, scan/PMBIST/ATPG and SI/EM-aware design.
To learn more about the Cadence full-flow digital and signoff solutions, visit www.cadence.com/go/samsung28fdsdands. For information about the Cadence custom/analog solutions, visit www.cadence.com/go/samsung28fdscanda.
The integrated, automated Cadence custom/analog tools and full-flow digital and signoff tools meet Samsung’s accuracy requirements, enabling foundry customers to quickly achieve design closure and deliver complex IoT and mixed-signal designs faster using the 28FDS process. In addition, the Cadence tools have been certified for tapeout using Samsung’s certification criteria for baseline accuracy.
The digital and signoff tools in the design flow include the Innovus™ Implementation System, Genus™ Synthesis Solution, Quantus™ QRC Extraction Solution, Conformal® Logic Equivalence Checking (LEC), Conformal Low Power, Tempus™ Timing Signoff Solution, Voltus™ IC Power Integrity Solution, Cadence Physical Verification System, Cadence Litho Physical Analyzer (LPA), Cadence CMP Predictor (CCP), Cadence LDE Electrical Analyzer (LEA) and Modus™ Test Solution. The custom/analog tools in the flow include the Spectre® Accelerated Parallel Simulator (APS), Spectre Extensive Partitioning Simulator (XPS), Spectre RF Simulator, Virtuoso® Schematic Editor, Virtuoso Analog Design Environment and Virtuoso Layout Suite.
“Samsung Foundry and Cadence collaborated on this new reference flow to provide mutual customers with a fast path to design closure,” said Jaehong Park, senior vice president of the Foundry Design Team at Samsung Electronics. “Using the certified Cadence custom/analog tools and full-flow digital and signoff tools with the Samsung 28FDS process enables engineers to efficiently deliver innovative IoT and mixed-signal designs to market.”
“Our tool sets allow customers to optimize the low-power/high-performance SOI tradeoffs required to meet the diverse end-use demands of the marketplace,” said Tom Beckley, senior vice president and general manager of the Custom IC & PCB Group at Cadence. “Through Samsung Foundry’s certification of our full-flow digital and signoff tools and custom/analog tools, our customers can create reliable designs using the 28FDS process.”
