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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
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          • Integrity 3D-IC Platform
          • Cadence Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
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          • Tempus Timing Signoff Solution
          • Voltus IC Power Integrity Solution
          • Pegasus Verification System
          • RESOURCES
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          • RESOURCES
          • Flows
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          • 112G/56G SerDes
          • Chiplet and D2D
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          • Tensilica Processor IP
        • RESOURCES
          • Discover PCIe
      • IC Package Design and Analysis
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  • 08 Jun 2015

Cadence Announces Next-Generation JasperGold Formal Verification Platform

JasperGold formal and formal-assisted technology is integrated into the Cadence System Development Suite delivering up to three-month project verification schedule reduction

SAN JOSE, Calif., 07 Jun 2015

HIGHLIGHTS:
  • Unified Cadence Incisive and JasperGold formal verification platform delivers up to 15X performance gain versus previous solutions
  • JasperGold platform, now integrated within the System Development Suite, finds bugs typically three months earlier than existing verification methods
  • JasperGold solution's powerful formal analysis engines are now integrated with Indago debug platform, automating root-cause analysis and on-the-fly what-if exploration
Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the next-generation Cadence® JasperGold® formal verification platform. This new formal verification solution integrates Cadence Incisive® formal technology and JasperGold technology into a single platform that delivers up to 15X performance improvement versus previous solutions. Moreover, as an integrated part of the Cadence System Development Suite, the JasperGold technology can help to reduce verification schedule by up to three months.

The next-generation JasperGold platform is currently available. For more information visit www.cadence.com/news/jaspergold.

The JasperGold platform significantly improves design quality and efficiency by integrating a comprehensive set of features into one solution, including:
  • Design compilation and formal engine technologies from Incisive® Formal Verifier and Incisive Enterprise Verifier, including the innovative Trident multi-cooperating engines. This enables easy migration for existing Incisive customers and up to 15X performance improvement for both bug-hunting and proof convergence modes.
  • The next-generation JasperGold platform has been fully integrated with the Cadence System Development Suite's Incisive simulation and Palladium® emulation platforms, and with vManager™ tool to enable comprehensive metric-driven verification. This results in an up to three-month schedule reduction through formal-assisted verification closure.
  • Proven JasperGold Visualize™ and QuietTrace™ technologies, which have been integrated with the Indago™ debug platform to further expand analysis and on-the-fly what-if exploration, helping reduce root-cause debug time up to 5-100X.
"As long-time customers of Incisive formal and simulation solutions, we are impressed with the next-generation JasperGold platform," stated Mark Dunn, executive vice president at Imagination Technologies. "As well as improved debug and ease-of-use, we've achieved a?significant?increase in performance compared to Incisive Enterprise Verifier, as measured by proof convergence in a given time."

"Delivering high quality SoC designs efficiently in an era of increasing design complexity is a continuing customer challenge," stated Oz Levia, vice president of Formal and Automated Verification, System & Verification Group at Cadence. "With this next-generation JasperGold platform, we've brought together the best of Cadence's formal verification technologies into a single JasperGold platform and linked that with simulation, emulation, debug and verification management to create a truly compelling and comprehensive solution to this customer challenge."

About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

For more information, please contact:
Cadence Newsroom
Cadence Design Systems, Inc.
408-944-7039
newsroom@cadence.com


© 2015 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo, Incisive, JasperGold, and Palladium are registered trademarks and Indago, QuietTrace, System Development Suite, Visualize, and vManager are trademarks of Cadence Design Systems, Inc. in the United States and other countries. All rights reserved. All other trademarks are the property of their respective owners.

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