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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Genus Synthesis Solution
          • Conformal Smart LEC
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Virtuoso RF Solution
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus IC Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Emulation and Prototyping
          • Formal and Static Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • JasperGold Formal Verification Platform
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • Interface IP
          • Denali Memory IP
          • Tensilica Processor IP
          • Analog IP
          • System / Peripherals IP
          • Verification IP
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
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        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Omnis
          • Sigrity Advanced SI
          • Sigrity Advanced PI
          • RESOURCES
          • System Analysis Center
          • System Analysis Resources Hub
          • AWR Free Trial
      • Embedded Software
      • PCB Design and Analysis
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          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
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  • 18 Mar 2015

Cadence and ARM Announce Strategic IP Interoperability Agreement

Broad agreement to enable IP interoperability testing and system performance optimization to improve SoC performance and time to market

SAN JOSE, Calif., 17 Mar 2015

Cadence Design Systems, Inc. (NASDAQ: CDNS) and ARM today announced the signing of a broad Intellectual Property (IP) Interoperability Agreement. This multiyear agreement provides reciprocal access to relevant IP portfolios from the Cadence® IP Group and ARM. Additionally, the agreement grants both companies rights to manufacture test chips containing Cadence IP and ARM IP and to provide development platforms to customers. The ability to test the IP interoperability in silicon is intended to enable Cadence and ARM to optimize performance and interoperability within systems on chip (SoCs) while accelerating time to market for customers in markets such as mobile, consumer, networking, storage, automotive and the Internet of Things (IoT).

The IP Interoperability Agreement covers existing and future ARM® Cortex® processors, ARM Mali™ GPUs, ARM CoreLink™ system IP, ARM Artisan® physical IP, and ARM POP™ IP; Cadence Design IP including cores for PCI Express®, MIPI, USB, HDMI, DisplayPort, Ethernet, analog, DDR/LPDDR PHY and multiple other memory and storage protocols.

"This agreement expands upon the successful EDA Technology Access and EDA Subscription Agreements ARM signed with Cadence last year to further enable our customers' designs to reach peak performance and power efficiency," said Pete Hutton, executive vice president and president of product groups, ARM. "Extending our collaboration with Cadence to IP interoperability means we are mutually embracing the increasing importance of optimizing the IP systems within SoC designs. By working together closely, we can continue to deliver the key technologies that allow our customers to push the boundaries of innovation."

"Through expanded collaboration, Cadence and ARM are able to develop and deliver solutions that enable our customers to rapidly design optimized high-performance ARM-based SoCs and speed time to market for complete systems," said Martin Lund, senior vice president, IP Group at Cadence. "This new agreement allows customers of both companies to get to market faster with pre-integrated IP solutions and continue pushing the envelope on low-power and high-performance SoC design."

About ARM
ARM is at the heart of the world's most advanced digital products. Our technology enables the creation of new markets and transformation of industries and society. We design scalable, energy-efficient processors and related technologies to deliver the intelligence in applications ranging from sensors to servers, including smartphones, tablets, enterprise infrastructure and the Internet of Things.

Our innovative technology is licensed by ARM Partners who have shipped more than 60 billion Systems on Chip (SoCs) containing our intellectual property since the company began in 1990. Together with our Connected Community, we are breaking down barriers to innovation for developers, designers and engineers, ensuring a fast, reliable route to market for leading electronics companies. Learn more and join the conversation at community.arm.com.

About Cadence Design Systems
Cadence Design Systems (NASDAQ: CDNS) plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

For more information, please contact:
Cadence Newsroom
408-944-7039
newsroom@cadence.com


© 2015 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. ARM, Artisan, and Cortex are registered trademarks of ARM Limited (or its subsidiaries) in the EU and/or elsewhere. CoreLink, Mali, and POP are trademarks of ARM

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For more information, please contact:

Cadence Newsroom

408.944.7039

newsroom@cadence.com

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