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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Genus Synthesis Solution
          • Conformal Smart LEC
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Virtuoso RF Solution
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus IC Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Emulation and Prototyping
          • Formal and Static Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • JasperGold Formal Verification Platform
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • Interface IP
          • Denali Memory IP
          • Tensilica Processor IP
          • Analog IP
          • System / Peripherals IP
          • Verification IP
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
      • System Analysis
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Omnis
          • Sigrity Advanced SI
          • Sigrity Advanced PI
          • RESOURCES
          • System Analysis Center
          • System Analysis Resources Hub
          • AWR Free Trial
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
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          • Flows
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      • AI IP Portfolio
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  • 11 Aug 2004

Cadence Announces New OrCAD Technology to Help Shorten PCB Design Cycles

PSpice Enhancements Provide Highest Level of Integration Between Analog Simulator and MathWorks' MATLAB

San Jose, CA, 10 Aug 2004

Cadence Design Systems, Inc. (NYSE and NASDAQ: CDN) today announced new PSpice-based simulation technology for the OrCAD® product line, enabling shortened PCB design cycles for the power electronics, military/aerospace, and automotive industries. Seamlessly integrating proven Cadence® PSpice® technology with industry-leading MATLAB® and Simulink® products from The MathWorks, the new PSpice SLPS interface, co-developed by Cadence and Cybernet Systems in Japan, allows co-simulation of electrical and mechanical systems, making it easier to detect critical issues early in the design cycle. When combined with the stress analysis capabilities of the new PSpice Smoke option, the reliability of designs can be analyzed and improved earlier in the design cycle.

"We welcome this integration between PSpice and our MATLAB and Simulink products," said Jim Tung, MathWorks Fellow at The MathWorks. "This is a significant step in the right direction to leverage advanced, cost-effective PCB design solutions with our Model-Based Design tools in the automotive, military/aerospace, and power electronics industries."

Currently, many companies design and test the electronics separately from the system level. With this approach, integration issues often aren't discovered until the prototype phase, causing critical time delays in getting a product to market. The new integration offered with the PSpice SLPS interface and the MATLAB and Simulink products helps designers avoid this problem. In many cases, this can achieve a successful system design with only one prototype.

The PSpice SLPS simulation environment supports the substitution of an actual electronic block, allowing co-simulation with MATLAB and Simulink and thereby enabling the designer to identify and correct integration issues of electronics within a system. This helps identify errors earlier in the design process, which can save time and money often spent in debugging trial boards within system designs. With the PSpice Smoke option, designers can perform a stress audit to verify that electrical components are operating within the manufacturers' safe operating limits or de-rated limits. The Smoke tool flags violations such as power dissipation, secondary breakdown limits, current/voltage and junction temperature limits. Because thermal violations are detected at the design level, design re-spins can be minimized.

"The latest additions to the OrCAD product line further demonstrate our on-going commitment to this market and, most importantly, the PCB designers we serve," said Steve Kamin, director of the OrCAD product line at Cadence. "Cadence is a pioneer in the field of PCB design and this new technology demonstrates our continuing efforts to develop innovative OrCAD solutions."

The PSpice SLPS interface and the PSpice Smoke option, available now, fit seamlessly into a front-to-back PCB design flow for power electronics; the PSpice product is already part of OrCAD Capture to OrCAD Layout and OrCAD Capture to Allegro PCB flows.

OrCAD products are distributed by a worldwide network of solution providers. For more information on OrCAD, please visit http://www.orcad.com.

About Cadence
Cadence is the world's largest supplier of electronic design technologies and engineering services. Cadence products and services are used to accelerate and manage the design of semiconductors, computer systems, networking equipment, telecommunications equipment, consumer electronics, and other electronics based products. With approximately 4,850 employees and 2003 revenues of approximately $1.1 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and trades on both the New York Stock Exchange and Nasdaq under the symbol CDN. More information is available at www.cadence.com.

For more information, please contact:
Molly Taylor
direct:408.975.3067
mtaylor@hoffman.com
The Hoffman Agency
for Cadence Design Systems


Cadence, the Cadence logo, OrCAD, PSpice and Allegro are registered trademarks of Cadence Design Systems. MATLAB and Simulink are registered trademarks of The MathWorks, Inc. All other trademarks are the property of their respective owners.

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