Home
  • Products
  • Solutions
  • Support
  • Company
  • EN US
    • SELECT YOUR COUNTRY OR REGION

    • China - 简体中文
    • Japan - 日本語
    • Korea - 한국어
    • Taiwan - 繁體中文

DESIGN EXCELLENCE

  • Digital Design and Signoff
  • Custom IC
  • Verification
  • IP
  • IC Package

SYSTEM INNOVATION

  • Multiphysics System Analysis
  • Embedded Software
  • PCB Design
  • Computational Fluid Dynamics

PERVASIVE INTELLIGENCE

  • AI / Machine Learning
  • AI IP Portfolio

CADENCE CLOUD

VIEW ALL PRODUCTS

Digital Design and Signoff

Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.

PRODUCT CATEGORIES

  • Logic Equivalence Checking
  • SoC Implementation and Floorplanning
  • Functional ECO
  • Low-Power Validation
  • Synthesis
  • Power Analysis
  • Constraints and CDC Signoff
  • Silicon Signoff and Verification
  • Library Characterization
  • Test

FEATURED PRODUCTS

  • Integrity 3D-IC Platform
  • Cadence Cerebrus Intelligent Chip Explorer
  • Genus Synthesis Solution
  • Innovus Implementation System
  • Tempus Timing Signoff Solution
  • Voltus IC Power Integrity Solution
  • Pegasus Verification System
  • RESOURCES
  • Flows

Custom IC / Analog / RF Design

Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.

PRODUCT CATEGORIES

  • Circuit Design
  • Circuit Simulation
  • Layout Design
  • Layout Verification
  • Library Characterization
  • RF / Microwave Solutions

FEATURED PRODUCTS

  • Spectre X Simulator
  • Spectre FX Simulator
  • Virtuoso Layout Suite
  • Virtuoso ADE Product Suite
  • Virtuoso Advanced Node
  • Voltus-Fi Custom Power Integrity Solution
  • RESOURCES
  • Flows

Verification

Offering a full verification flow to our customers and partners that delivers the highest verification throughput in the industry

PRODUCT CATEGORIES

  • Debug Analysis
  • Virtual Prototyping
  • Emulation and Prototyping
  • Static and Formal Verification
  • Planning and Management
  • Simulation
  • Software-Driven Verification
  • Verification IP
  • System-Level Verification IP

FEATURED PRODUCTS

  • vManager Verification Management
  • Jasper C Apps
  • Helium Virtual and Hybrid Studio
  • Xcelium Logic Simulation
  • Palladium Enterprise Emulation
  • Protium Enterprise Prototyping
  • System VIP
  • RESOURCES
  • Flows

IP

An open IP platform for you to customize your app-driven SoC design.

PRODUCT CATEGORIES

  • 112G/56G SerDes
  • Chiplet and D2D
  • Denali Memory Interface and Storage IP
  • Interface IP
  • PCIe and CXL
  • Tensilica Processor IP

RESOURCES

  • Discover PCIe

IC Package Design and Analysis

Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.

PRODUCT CATEGORIES

  • Cross-Platform Co-Design and Analysis
  • IC Package Design
  • SI/PI Analysis
  • SI/PI Analysis Point Tools
  • Flows

Multiphysics System Analysis

Cadence® system analysis solutions provide highly accurate electromagnetic extraction and simulation analysis to ensure your system works under wide-ranging operating conditions.

PRODUCT CATEGORIES

  • Computational Fluid Dynamics
  • Electromagnetic Solutions
  • RF / Microwave Design
  • Signal and Power Integrity
  • Thermal Solutions

FEATURED PRODUCTS

  • Clarity 3D Solver
  • Clarity 3D Solver Cloud
  • Clarity 3D Transient Solver
  • Celsius Thermal Solver
  • Fidelity CFD
  • Sigrity Advanced SI
  • Celsius Advanced PTI
  • RESOURCES
  • System Analysis Center
  • System Analysis Resources Hub
  • AWR Free Trial

Embedded Software

PCB Design and Analysis

Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.

PRODUCT CATEGORIES

  • Design Authoring
  • PCB Layout
  • Library and Design Data Management
  • Analog/Mixed-Signal Simulation
  • SI/PI Analysis
  • SI/PI Analysis Point Tools
  • RF / Microwave Design
  • Augmented Reality Lab Tools

FEATURED PRODUCTS

  • Allegro Package Designer Plus
  • Allegro PCB Designer
  • Allegro X Design Platform
  • RESOURCES
  • What's New in Allegro
  • Advanced PCB Design & Analysis Resources Hub
  • Flows

Computational Fluid Dynamics

AI / Machine Learning

AI IP Portfolio

Industries

  • 5G Systems and Subsystems
  • Aerospace and Defense
  • Automotive
  • Hyperscale Computing

Technologies

  • 3D-IC Design
  • Advanced Node
  • AI / Machine Learning
  • Arm-Based Solutions
  • Cloud Solutions
  • Computational Fluid Dynamics
  • Functional Safety
  • Low Power
  • Mixed Signal
  • Photonics
  • RF / Microwave
See how our customers create innovative products with Cadence

Support

  • Support Process
  • Online Support
  • Software Downloads
  • Computing Platform Support
  • Customer Support Contacts
  • Technical Forums

Training

  • Custom IC / Analog / RF Design
  • Languages and Methodologies
  • Digital Design and Signoff
  • IC Package
  • PCB Design
  • System Design and Verification
  • Tensilica Processor IP
Stay up to date with the latest software 24/7 - Cadence Online Support Visit Now

Corporate

  • About Us
  • Designed with Cadence
  • Investor Relations
  • Leadership Team
  • Computational Software
  • Alliances
  • Corporate Social Responsibility
  • Cadence Academic Network

Media Center

  • Events
  • Newsroom
  • Blogs

Culture and Careers

  • Culture and Diversity
  • Careers
Learn how Intelligent System Design™ powers future technologies Browse Cadence’s latest on-demand sessions and upcoming events. Explore More
US - English
  • China - 简体中文
  • Japan - 日本語
  • Korea - 한국어
  • Taiwan - 繁體中文
  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Integrity 3D-IC Platform
          • Cadence Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Voltus IC Power Integrity Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Spectre FX Simulator
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus-Fi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Virtual Prototyping
          • Emulation and Prototyping
          • Static and Formal Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • Jasper C Apps
          • Helium Virtual and Hybrid Studio
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • 112G/56G SerDes
          • Chiplet and D2D
          • Denali Memory Interface and Storage IP
          • Interface IP
          • PCIe and CXL
          • Tensilica Processor IP
        • RESOURCES
          • Discover PCIe
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
      • Multiphysics System Analysis
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Solver Cloud
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Fidelity CFD
          • Sigrity Advanced SI
          • Celsius Advanced PTI
          • RESOURCES
          • System Analysis Center
          • System Analysis Resources Hub
          • AWR Free Trial
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • Allegro X Design Platform
          • RESOURCES
          • What's New in Allegro
          • Advanced PCB Design & Analysis Resources Hub
          • Flows
      • Computational Fluid Dynamics
    • PERVASIVE INTELLIGENCE
      • AI / Machine Learning
      • AI IP Portfolio
    • CADENCE CLOUD
    • VIEW ALL PRODUCTS
  • Solutions
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • Hyperscale Computing
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • AI / Machine Learning
        • Arm-Based Solutions
        • Cloud Solutions
        • Computational Fluid Dynamics
        • Functional Safety
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • Hyperscale Computing
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • AI / Machine Learning
        • Arm-Based Solutions
        • Cloud Solutions
        • Computational Fluid Dynamics
        • Functional Safety
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • Hyperscale Computing
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • AI / Machine Learning
        • Arm-Based Solutions
        • Cloud Solutions
        • Computational Fluid Dynamics
        • Functional Safety
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
  • Support
      • Support
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • Training
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • Support
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • Training
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • Support
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • Training
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
  • Company
      • Corporate
        • About Us
        • Designed with Cadence
        • Investor Relations
        • Leadership Team
        • Computational Software
        • Alliances
        • Corporate Social Responsibility
        • Cadence Academic Network
      • Media Center
        • Events
        • Newsroom
        • Blogs
      • Culture and Careers
        • Culture and Diversity
        • Careers
      • Corporate
        • About Us
        • Designed with Cadence
        • Investor Relations
        • Leadership Team
        • Computational Software
        • Alliances
        • Corporate Social Responsibility
        • Cadence Academic Network
      • Media Center
        • Events
        • Newsroom
        • Blogs
      • Culture and Careers
        • Culture and Diversity
        • Careers
      • Corporate
        • About Us
        • Designed with Cadence
        • Investor Relations
        • Leadership Team
        • Computational Software
        • Alliances
        • Corporate Social Responsibility
        • Cadence Academic Network
      • Media Center
        • Events
        • Newsroom
        • Blogs
      • Culture and Careers
        • Culture and Diversity
        • Careers

  • Home
  •   :  
  • About Us
  •   :  
  • Newsroom
  •   :  
  • News Releases
  •   :  
  • 24 Oct 2016

Cadence Reports Third Quarter 2016 Financial Results

SAN JOSE, Calif. , 24 Oct 2016

Click here for the Q3 2016 Financial Schedules.

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced results for the third quarter 2016.

Cadence reported third quarter 2016 revenue of $446 million, compared to revenue of $434 million reported for the same period in 2015. On a GAAP basis, Cadence recognized net income of $65 million, or $0.23 per share on a diluted basis, in the third quarter of 2016, compared to net income of $78 million, or $0.25 per share on a diluted basis, for the same period in 2015.

Using the non-GAAP measure defined below, net income in the third quarter of 2016 was $85 million, or $0.30 per share on a diluted basis, as compared to net income of $89 million, or $0.28 per share on a diluted basis, for the same period in 2015.

“We continued to make progress on our System Design Enablement strategy in the third quarter, which resulted in solid financial results,” said Lip-Bu Tan, president and chief executive officer. “Our digital and signoff solutions maintained their momentum with market-shaping customers; five new systems customers, including a major aerospace company, adopted our Palladium® Z1 emulation platform; and we increased our expansion into automotive functional safety verification.”

“Our results for the third quarter reflect our relentless focus on innovation and execution,” said Geoff Ribar, senior vice president and chief financial officer. “We believe that we are well-positioned for the rest of the year as we continue to execute on our strategic priorities and return capital to shareholders. In the third quarter, we repurchased 9.6 million shares of stock, and we have now repurchased 42.5 million shares for $960 million under the current $1.2 billion program, representing approximately 15 percent of shares outstanding as of July 4, 2015.”

CFO Commentary
Commentary on the third quarter 2016 financial results by Geoff Ribar, senior vice president and chief financial officer, is available at www.cadence.com/cadence/investor_relations.

Business Outlook
For the fourth quarter of 2016, the company expects total revenue in the range of $463 million to $473 million. Fourth quarter GAAP net income per diluted share is expected to be in the range of $0.18 to $0.20. Net income per diluted share using the non-GAAP measure defined below is expected to be in the range of $0.32 to $0.34.

For 2016, the company expects total revenue in the range of $1.810 billion to $1.820 billion. On a GAAP basis, net income per diluted share for 2016 is expected to be in the range of $0.74 to $0.76. Using the non-GAAP measure defined below, net income per diluted share for 2016 is expected to be in the range of $1.19 to $1.21.

A schedule showing a reconciliation of the business outlook from GAAP net income and diluted net income per share to non-GAAP net income and diluted net income per share is included in this release.

Audio Webcast Scheduled
Lip-Bu Tan, president and chief executive officer, and Geoff Ribar, senior vice president and chief financial officer, will host a third quarter 2016 financial results audio webcast today, October 24, 2016, at 2 p.m. (Pacific) / 5 p.m. (Eastern). Attendees are asked to register at the website at least 10 minutes prior to the scheduled webcast. An archive of the webcast will be available starting October 24, 2016 at 5 p.m. (Pacific) and ending December 16, 2016 at 5 p.m. (Pacific). Webcast access is available at www.cadence.com/cadence/investor_relations.


About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence® software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, California, with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company and its products and services is available at www.cadence.com.

The statements contained above regarding Cadence’s third quarter 2016 financial results, as well as the information in the Business Outlook section, are or include forward-looking statements based on current expectations or beliefs and preliminary assumptions about future events that are subject to factors and uncertainties that could cause actual results to differ materially from those described in the forward-looking statements. These forward-looking statements are subject to a number of risks, uncertainties and other factors, many of which are outside Cadence’s control, including, among others: (i) Cadence’s ability to compete successfully in the electronic design automation product and the commercial electronic design and methodology services industries; (ii) the success of Cadence’s efforts to improve operational efficiency and growth; (iii) the mix of products and services sold and the timing of significant orders for Cadence’s products; (iv) change in customer demands, including those resulting from consolidation among Cadence’s customers and the possibility that the restructurings and other efforts to improve operational efficiency of Cadence’s customers could result in delays in purchases of Cadence’s products and services; (v) economic and industry conditions in regions in which Cadence does business; (vi) fluctuations in rates of exchange between the U.S. dollar and the currencies of other countries in which Cadence does business; (vii) capital expenditure requirements, legislative or regulatory requirements, interest rates and Cadence’s ability to access capital and debt markets; (viii) the acquisition of other companies or technologies or the failure to successfully integrate and operate these companies or technologies Cadence acquires, including the potential inability to retain customers, key employees or vendors; (ix) the effects of Cadence’s efforts to improve operational efficiency in its business, including strategic, customer and supplier relationships, and its ability to retain key employees; (x) events that affect the reserves or settlement assumptions Cadence may take from time to time with respect to accounts receivable, taxes, litigation or other matters; and (xi) the effects of any litigation or other proceedings to which Cadence is or may become a party.

For a detailed discussion of these and other cautionary statements related to Cadence’s business, please refer to Cadence’s filings with the U.S. Securities and Exchange Commission, which include Cadence’s most recent reports on Form 10-K and Form 10-Q, including Cadence’s future filings.

GAAP to Non-GAAP Reconciliation
Non-GAAP financial measures should not be considered as a substitute for or superior to measures of financial performance prepared in accordance with generally accepted accounting principles, or GAAP. Investors are encouraged to review the reconciliation of non-GAAP financial measures contained within this press release with their most directly comparable GAAP financial results. Investors are also encouraged to look at the GAAP results as the best measure of financial performance.

To supplement Cadence’s financial results presented on a GAAP basis, Cadence management uses non-GAAP measures that it believes are helpful in understanding Cadence’s performance. One such measure is non-GAAP net income, which is a financial measure not calculated under GAAP. Non-GAAP net income is calculated by Cadence management by taking GAAP net income and excluding, as applicable, amortization of intangible assets and debt discount related to convertible notes, stock-based compensation expense, acquisition and integration-related costs including retention expenses, special charges, investment gains or losses, income or expenses related to Cadence’s non-qualified deferred compensation plan, restructuring and other significant items not directly related to Cadence’s core business operations, and the income tax effect of non-GAAP pre-tax adjustments.

Cadence’s management uses non-GAAP net income because it excludes items that are generally not directly related to the performance of the company’s core business operations and therefore provides supplemental information to Cadence’s management and investors regarding the performance of the business operations, facilitates comparisons to the historical operating results and allows the review of Cadence’s business from the same perspective as Cadence’s management, including forecasting and budgeting.

The following tables reconcile the specific items excluded from GAAP net income and GAAP net income per diluted share in the calculation of non-GAAP net income and non-GAAP net income per diluted share for the periods shown below:

Net Income Reconciliation Three Months Ended
  October 1,
2016
October 3,
2015
(in thousands) (unaudited)
Net income on a GAAP basis $64,712 $77,624
Amortization of acquired intangibles 14,482 15,794
Stock-based compensation expense 29,998 24,117
Non-qualified deferred compensation expenses (credits) 921 (1,508)
Restructuring and other charges 101 303
Acquisition and integration-related costs 1,841 948
Other income or expense related to investments and non-qualified deferred compensation plan assets* (806) 174
Income tax effect of non-GAAP adjustments (26,424) (28,601)
Net income on a non-GAAP basis $84,825 $88,851

*Includes, as applicable, equity in losses or income from investments, write-down of investments, gains or losses on sale of investments and gains or losses on non-qualified deferred compensation plan assets recorded in other income or expense.

Diluted Net Income per Share Reconciliation Three Months Ended
  October 1,
2016
October 3,
2015
(in thousands, except per share data) (unaudited)
Diluted net income per share on a GAAP basis $0.23 $0.25
Amortization of acquired intangibles 0.05 0.05
Stock-based compensation expense 0.10 0.08
Non-qualified deferred compensation expenses (credits) - (0.01)
Restructuring and other charges - -
Acquisition and integration-related costs 0.01 -
Other income or expense related to investments and non-qualified deferred compensation plan assets* - -
Income tax effect of non-GAAP adjustments (0.09) (0.09)
Diluted net income per share on a non-GAAP basis $0.30 $0.28
Shares used in calculation of diluted net income per share — GAAP** 287,473 313,186
Shares used in calculation of diluted net income per share — non-GAAP** 287,473 313,186
* Includes, as applicable, equity in losses or income from investments, write-down of investments, gains or losses on sale of investments and gains or losses on non-qualified deferred compensation plan assets recorded in other income or expense.

** Shares used in the calculation of GAAP net income per share are expected to be the same as shares used in the calculation of non-GAAP net income per share, except when the company reports a GAAP net loss and non-GAAP net income, or GAAP net income and a non-GAAP net loss.

Cadence expects that its corporate representatives will meet privately during the quarter with investors, the media, investment analysts and others. At these meetings, Cadence may reiterate the business outlook published in this press release. At the same time, Cadence will keep this press release, including the business outlook, publicly available on its website.

Prior to the start of the Quiet Period (described below), the public may continue to rely on the business outlook contained herein as still being Cadence’s current expectations on matters covered unless Cadence publishes a notice stating otherwise.

Beginning December 16, 2016, Cadence will observe a Quiet Period during which the business outlook as provided in this press release and the most recent Annual Report on Form 10-K and Quarterly Report on Form 10-Q no longer constitute the company’s current expectations. During the Quiet Period, the business outlook in these documents should be considered historical, speaking as of prior to the Quiet Period only and not subject to any update by the company. During the Quiet Period, Cadence’s representatives will not comment on Cadence’s business outlook, financial results or expectations. The Quiet Period will extend until the day when Cadence’s fourth quarter and fiscal year 2016 earnings release is published, which is currently scheduled for February 1, 2017.


For more information, please contact:

Investors and Shareholders
Alan Lindstrom
Cadence Design Systems, Inc.
408-944-7100
investor_relations@cadence.com

Media and Industry Analysts
Craig Cochran
Cadence Design Systems, Inc.
408-944-7039
newsroom@cadence.com


Cadence, the Cadence logo and Palladium are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

Media Contacts

For more information, please contact:

Cadence Newsroom

408.944.7039

newsroom@cadence.com

A Great Place to Do Great Work!

Eighth year on the FORTUNE 100 list

Our Culture Join The Team
  • Products
  • Custom IC and RF
  • Digital Design and Signoff
  • IC Package
  • IP
  • PCB Design
  • System Analysis
  • Verification
  • All Products
  • Company
  • About Us
  • Leadership Team
  • Investor Relations
  • Alliances
  • Careers
  • Cadence Academic Network
  • Supplier
  • Media Center
  • Events
  • Newsroom
  • Designed with Cadence
  • Blogs
  • Forums
  • Contact Us
  • Send Us A Message
  • Customer Support
  • Media Relations
  • Global Office Locator

Stay Connected

Please confirm to enroll for subscription!

Stay Connected

Thank you for subscribing. You will get an email to confirm your subscription.

© 2022 Cadence Design Systems, Inc. All Rights Reserved.

Terms of Use Privacy US Trademarks Do Not Sell My Personal Information