Past Events

CadenceTECHTALK: Advances in EM Analysis and Design Flows for Integrated RF Systems

This webinar examines how distributed, multiprocessing electromagnetic (EM) analysis for large-scale RF design provides a system signoff workflow made possible through the integration of the Clarity 3D Solver within the AWR Design Environment V16 platform. Several practical examples will demonstrate PCB-based design verification, RF in-design for MMIC in-package characterization, and a phased array antenna design and optimization workflow.

CadenceTECHTALK: How to Improve Your Chip Design Performance and Productivity Using Machine Learning

In this webinar, we will highlight the critical technologies behind the new Cadence® Cerebrus™, Intelligent Chip Explorer and the RTL-to-signoff implementation flow to show how they can help you achieve up to 10X productivity 20% PPA improvements for implementation.

Girls Who Code

Join Cadence at the Girls Who Code Hiring Summit, welcoming the Girls Who Code community of college students, recent graduates, and young professionals to network with companies looking to connect with a talented, ambitious, diverse group of technical students and professionals. Visit our virtual booth to hear from Cadence employees on “Navigating the Early Career Years” and “Tips and Tricks for Building Your Resume.” Cadence is sponsoring a virtual photobooth where attendees can have a digital headshot taken.

GF Technology Summit 2021

Join us at the GF Technology Summit 2021, and find out how Cadence and Globalfoundries are partnering to empower our customers to turn design concepts into reality.

ChipEXPO 2021

Join Cadence at ChipEXPO, where Aleksei Ivanov will be discussing how to improve power consumption during design phase using Cadence Digital Front-End solutions. Be sure to also visit Cadence virtual booth.

CadenceTECHTALK: Allegro & OrCAD オンライン・セミナー 2021 September

Allegro/OrCADのご経験をお持ちのユーザー様にご理解いいただける内容でご用意しており、SPB17.4 QIR3で追加された新機能をご紹介します。

AI Hardware Summit

This year’s AI Hardware Summit focuses on systems-level optimizations for specific AI workloads and results from novel AI acceleration technologies. Hear about real-world results from AI hardware moving the needle in research and industry. Your one-stop shop for AI hardware due diligence or competitive intelligence.

On-demand CadenceTECHTALK: Indago の新機能 Python API で検証のラストワンマイルを埋める！

Indago の新機能である Python API で実現できる機能の例を紹介させて頂きます。この新機能を活用して、人手で行っていたデザイン固有の定型作業を機能として実現する事により効率化し、最も重要なデバッグや思考に集中できる検証環境を構築しませんか。

On-Demand CadenceTECHTALK: Mixed-Signal SoC Verification Simplified with Xcelium Simulator (NA)

Analog and mixed-signal verification has always been a challenge for design and verification engineers. It has become tedious with the increasing complexity of SoC designs. Join this webinar to learn how Cadence is providing effective verification and debug methodologies using RNM of analog blocks for mixed-signal SoC verification.

CadenceLIVE India 2021

CadenceLIVE India 2021 brings together Cadence technology users, developers, and industry experts to connect, share ideas and best practices, and inspire design creativity.