DATE 2023

The Design, Automation and Test in Europe (DATE) conference is the main European event bringing together designers and design automation users, researchers, and vendors, as well as specialists in the hardware and software design, test, and manufacturing of electronic circuits and systems. DATE puts a strong emphasis on both technology and systems, covering ICs/SoCs, reconfigurable hardware and embedded systems as well as embedded software.

CadenceCONNECT: Club Formal India

Cadence is pleased to once again bring you CadenceCONNECT: Club Formal, a platform for formal verification experts to come together and discuss the latest in formal technologies, including challenges, benefits, and best practices. Hear from your peers on how they are using formal verification techniques in their flows and interact with members of the Cadence® R&D team to discuss the technology, roadmap, and use cases. In this in-person seminar, you will hear an industry keynote, a Cadence R&D keynote on the latest in JasperTM technology, and several users who will discuss best practices. Plus, we will have deep technical demos and presentations by Cadence formal experts.

HiFiLeD Symposium 2022

Join us at HiFiLeD Symposium in December 2022. The topics will be range from issues concerning the complexity, reliability, accuracy and uncertainties in generating the High-Fidelity LES/DNS data, to their application towards turbulence and transition modeling. It will include progress on the underlying high-order numerical methods (HOMs), innovative approaches for CPU acceleration for LES and DNS, exploitation of massive parallel architectures, efficient post-processing on massive parallel hardware, innovative machine learning methods, as well as experimental data. Moreover, the Symposium offers the opportunity to communicate and exchange knowledge for academic researchers, graduate students, industrial engineers, as well as industrial R&D managers and consultants working in the fields of turbulent flow modeling, simulations, measurements, and multidisciplinary CFD applications.

2022 EDA Workshop (Taiwan)

2022 電子設計自動化研討會將於12/10 &12/11於新竹關西舉辦，除了延續提升 EDA 產學界國際競爭力，也會探索產學界如何因應未來 EDA 與電子產業的變化、營造 EDA 領域人才創業的氛圍，以持續帶動國內 EDA 領域之研究發展。Join Cadence speech at EDA workshop to learn about 「The Future of Intelligent Chip Design」and visit our booth to know about Cadence and EDA industry.

CES 2023

Want to see exciting technology that is behind some of the biggest innovations at CES? Book a meeting now to visit the Cadence® invitation-only suites at CES 2023, January 5-8 at the Venetian Expo, Level 2, Titian 2201B.

AIAA SciTech Forum 2023

Visit us at AIAA SciTech 2023, where Cadence technical experts will be presenting papers in technical sessions, demonstrating software, and answering technical questions in booth 511.

CadenceCONNECT: Functional Verification Seminar 2022

Verisiumをはじめとする検証課題を解決する先進的ソリューションをご紹介します。

CadenceTECHTALK: Best Practices to Achieve the Highest Performance using Xcelium Logic Simulator

Wondering how you can easily achieve up to 3X exemplary performance gains using Xcelium Logic Simulator. This webinar will provide a handy checklist of best practices covering umbrella performance switches, “access” levels, and simulation profiling to achieve the highest performance using Xcelium.

CadenceTECHTALK: チップ全体の最適化およびサインオフを10倍高速化するCertus Closure Solutionのご紹介

今年10月11日に発表した新製品Certus Closure Solutionを紹介いたします。並列分散同時処理によって、デザインの大きさに制限なく、タイミングおよびパワーの最適化を一晩で完了可能なソリューションの概要をユーザ事例と併せて説明いたします。

Training Webinar: Solve Tricky SVA Problems with Jasper Visualize and WaveEdit

Join Cadence Training and Sr. Principal Education Application Engineer Mike Avery for this free technical Training Webinar. We’ll demonstrate how Jasper Visualize and WaveEdit provide an easy-to-use vehicle, so you can get the answers to your own questions—quickly and easily