CDNLive Israel 2019 Proceedings

Conference Proceedings

Custom IC and Analog

CUS3 : Automated RF and Analog Design
Ron Pongratz, Intel
CUS5 : Mixed Signal Simulation of a 12 bit 50 MS/s Dual Channel Time Domain Two Step ADC
Tibi Galambos, Analog Value
CUS6 : PVS Voltage Aware DRC Using PVL Tcl DFM PROPERTY Advance Commands
Ofer Tamir, TowerJazz
CUS7 : Managing Design Traceability for AMS Tapeouts
Ioannis Syranidis, Cliosoft

Education Services

ES1 : The New Design Approach: High-Level Synthesis Introduction for RTL Designers
Dror Constantinis, Cadence
ES3 : Writing Good Skill Code
Gennady Garbovich, Cadence

Full - Flow Digital Design and Signoff

DSG3 : Innovus Mixed Macro Placer
Arik Zigelboim, Mellanox
DSG4 : High-Level Synthesis Will Supercharge Your IP Development
Elad Litman, Intel
DSG5 : BIU Experience: Pegasus and Common UI
Rinat Breuer, Bar Ilan University
Yonatan Shoshan, Bar Ilan University
DSG6 : Equivalence Check with Low Power
Maayan Hanuka, Intel
DSG7 : Implementation of Large Scale Design Changes with Conformal ECO
Niv Margalit, Magicleap

IP4 : Spring Hill – Intel’s Data Center Inference Chip
Moshe Maor, Intel
IP5 : Hearing Sense in Smart Devices
Robert Schrager, Alango Technologies
IP6 : The Power of Sound-Over-Data
Benny Saban, Sonarax
IP7 : Green Hills - Addressing the State of Safety and Security in Today’s Autonomous Vehicles System Designs
Stephan Janouch, Green Hills Software

IP and Block Verification

IBV3 : Hybrid Verification Approach of Embedded Processor Integration
Elihai Maicas, Intel
IBV4 : Formal Verification of a Custom uController – A Case Study
Elchanan Rappaport, Veriest
IBV5 : Enhanced Test Composition and Generation by Integration
Slava Salnikov, Texas Instruments
Liran Kosovizer, Texas Instruments
IBV6 : Automotive V Model Verification Flow
Itai Netter, Auto-talks
IBV7 : Modelling DMA in Behavioral Processors Simulations Using DPI-C
Doron Gombosh, Satixfy

PCB Design and System Analysis

PCB2 : Introducing New OrCAD 17.4 Release
Alexander Slutski, EDAIS
Ilya Zevin, EDAIS
PCB6 : Multitasking PCB Layout with Several Designers to Reduce Project Time
Evgeny Makhline, Nistec

SoC and System Verification

SVG3 : Enabling Early FW Development and Debug Using Emulation Platform
Vadim Malenboim, Intel
SVG4 : Hybrid Virtual + Emulation SoC Platform for SW-Drivers Validation
Gil Peled, Intel-Mobileye
SVG5 : Pre-Silicon Verification of an Ethernet Packet Processor
Gustavo Rodberg, Marvell
SVG6 : Protium Platform Usage in Early SW Bring-Up of SoC
Ely Zyss, Altair
SVG7 : Using PSS to Accelerate Validation Stimuli Development and Execution Efficiency
Ramon Chemel, Intel

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CDNLive Israel 2019 Retrospective