- Session AC01 : Updated Cadence 2018 Portfolio Available for European Academics via Europractice
Bryony Howard, Science and Technology Facilities Council - Session AC02 : SW/HW System Co-Design Enablement for Coarse-Grain Heterogeneous Manycore Platforms
Alexey Syschikov, Saint Petersburg State University of Aerospace Instrumentation - Session AC03 : Processor Architecture Tradeoffs for On-Site Electronics in Harsh Environment
Stephan Nolting, Leibniz Universität Hannover - Session AC04 : Evaluation of Heterogeneous Tool Chains for Building Complex FPGA-Based MPSoCs
Rizwan Tariq Syed, IHP Microelectronics - Session AC05 : Visual Programming Environment for Cadence SKILL
Florian Leber, Reutlingen University
Yannick Uhlmann, Reutlingen University
Jürgen Scheible, Reutlingen University
- Session AC06 : Design Flow Automation for On-Chip Inductors
Stefan Kosnac, University of Heidelberg - Session AC07 : Impedance Matching Network Synthesis Toolbox for Cadence
Aleksandr Vasjanov, Vilnius Gediminas Technical University - Session AC08 : Teaching Microelectronic Design by Doing
Massimo Barbaro, Università degli Studi di Cagliari - Session AC10 : Embedded Toggle Generator to Provide Realistic Test Conditions During Test of Digital 2D-SoCs and 3D
Leonidas Katselas, Aristotle University of Thessaloniki - Session AC11 : High-Level Design of Finite State Machines
Niels Burkhardt, EXTOLL - Session AC12 : Cell-Aware Test: Significant Test Quality Improvement at Affordable Cost
Zhan Gao, IMEC - Session AC13 : EDA Tools and Methodologies for High Quality Nanoelectronic Systems
Felipe Augusto da Silva, Cadence
Ahmet Cagri Bagbaba, Cadence - Session AC-Techtorial I : Creating a Parameterized Layout Module with Cadence PCell Designer
Jürgen Scheible, Reutlingen University
Florian Leber, Reutlingen University - Session AC-Techtorial II : Physical Implementation with Modgens
Saul Rodriguez Duenas, KTH Royal Institute of Technology
Johan Larsson, Cadence
