|27-30 Nov 2017||
The 26th IEEE Asian Test Symposium (ATS 2017)
The Asian Test Symposium (ATS) provides an open forum for researchers and industrial practitioners from all countries of the world to exchange innovative ideas on system, board, and device testing with design, manufacturing, and field consideration in mind.
For more details, visit ares.ee.ncu.edu.tw/ats17/index.php
|2-3 Dec 2017||
2017 EDA Workshop
The 13th Workshop on Electronic Design Automation in Taiwan helps increase the academic exchange of domestic professors' opinions in the EDA field to improve the quality of EDA papers. It also enhances the international competitiveness of academic production, which will explore the future changes in academia EDA and electronics industry to continually drive the domestic research and development in the field.
Jess Yang, Cadence Taiwan R&D Director will give an invited talk on “EDA, Things You Need to Know” on December 2, 2017.
More details: www.eda-workshop.tw/
12-14 Dec 2017
Digital Implementation of 28nm Designs Seminar
The Cadence Academic Network, together with MEPHI University in Moscow, is organizing a free seminar on digital implementation (front-to-back) of 28nm designs. On the first day, several Cadence engineers will present new Cadence® tools targeted on digital design, and on the second day, labs will be provided to teach young academics about these tools.
For more information, visit cad.mephi.ru.
22-25 Jan 2018
23rd Asia and South Pacific Design Automation Conference
ASP-DAC 2018 is the twenty-third annual international conference on VLSI design automation in Asia and South Pacific region, one of the most active regions of design and fabrication of silicon chips in the world. The conference aims at providing the Asian and South Pacific CAD/DA and Design community with opportunities of presenting recent advances and with forums for future directions in technologies related to Electronic Design Automation (EDA).
For more details, visit aspdac.kaist.ac.kr
As a specially recognized “Global Education Partner” by ACM SIGDA, Cadence will also sponsor the Student Research Forum at the ASP-DAC, which is renovated from a poster session for students to present their dissertation research with experts, extended to offer a great opportunityies to establish contacts for their future career. In addition, it helps companies to know the latest research and discover talents for the employment. Please join us and you will get a chance to talk with Cadence R&D leaders face to face.
More details: aspdac.kaist.ac.kr/srf/srf.html
|16-19 Apr 2018||
The 2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) provides excellent opportunities for close interactions between industrial and scientific researchers via presentations and discussions on innovations and achievements related to VLSI design, automation and test.
Weibin Ding, Group Director of Digital Implementation Group, DSG Cadence will give an invited talk during the special session at VLSI-DAT about machine learning for EDA on "Machine Learning Further Improving Place and Route QoR"
More details: expo.itri.org.tw/2018vlsidat
The Cadence iLS courses, laboratories, and Rapid Adoption Kits have been tremendously useful in rapidly improving my research team and student skill set in electronic design automation. I strongly recommend using the iLS tools if you want to effectively improve your EDA and digital design skill set.
Dr. Matthew Morrison, Assistant Professor, University of Mississippi
Cadence is a leader in supporting technical and professional activities that have enabled building an EDA community. ACM SIGDA is very appreciative of the their continued support to nurture young professionals and students through sustained support of activities at major EDA conferences.
Dr. Vijaykrishnan Narayanan, ACM SIGDA Chair, Distinguished Professor of Computer Science and Engineering, Pennsylvania State University
We are grateful for the engagement with Cadence over the past 10 years. It has led us to innovative breakthroughs and has helped us educate pioneering scholars for the future workforce in EDA.
Dr. Xin Li Professor, Electrical and Computer Engineering, Duke University
Cadence Academic Network support is the key to enabling our capabilities in innovating integrated circuit and system design with extreme energy/power efficiency. The quality of Cadence tools is outstanding and offers responsive support to address the challenges posed by new design methodologies and techniques.
Prof. Massimo Alioto, IEEE Fellow Director of the Integrated Circuit and Embedded Systems Lab, National University of Singapore
The greatest benefit that we get from the Cadence Academic Network is access to the most modern tools for electronic design automation.
Professor Ulrich Bruening, University of Heidelberg, Germany
The Academic Network helps us to be in line with the newest technology from Cadence, helping my research to stay at the leading edge.
Professor Michael Huebner, Ruhr-University of Bochum, Germany
The comprehensive reach of the Cadence Academic Network has help us cover every aspect of design from analog circuitry to digital and system design, so it is extremely useful for us.
Professor Mladen Berekovic, Braunschweig University of Technology
Cadence has made us confident in our work, because we know that we are instructing students in the most modern and capable tools which are used worldwide.
Professor Marek Wójcikowski, Gdansk University, Poland
We are proud to be part of Cadence Academic Network because it provides us the opportunity to interact with other leading institutions covering a broad range of research topics.
Professor Holger Blume, Leibniz University of Hannover, Germany