NXP Shortens Verification Cycle for Smart Card SoC

NXP strives to deliver bug-free products. Learn how design engineer Rajesh Chitturi worked with his team to save 1.5 weeks from their verification cycle while increasing code coverage to 95% using flow based on Cadence Incisive Enterprise Manager, Incisive Enterprise Verifier, Incisive Metric Center

上次修改時間: March 18, 2016

持續時間: 3 min