Fast Debug of RTL, Speedy Post Analysis

For Altair Semiconductor develops SoCs for smartphones, tablets, fast time to market is critical. Verifying SoC architecture can be challenging, but the company addressed this with a verification flow based on Cadence® Incisive® Enterprise Simulator, the IEEE 1647, elanguage, vManager for regression

上次修改時間: March 18, 2016

持續時間: 4 min