Sigrity Tech Tip: How DDR interfaces can be accurately analyzed pain-free (without large S-parameters)

Sigrity technologists guide you step by step on how to use the Sigrity Finite Difference Time Domain (FDTD) simulator to accurately predict the impact of simultaneous switching noise (SSN) in a system context. A PCB layout is directly connected to a system topology without having to perform an S-parameter extraction. This “FDTD-direct” methodology overcomes the challenge faced by SI engineers who fear accuracy could be compromised when converting an S-parameter to a simplified broadband spice model. Allegro Sigrity SI Base (http://goo.gl/L1k5GX) and Power-Aware SI Option (http://goo.gl/8uouKV) are demonstrated.

上次修改時間: November 22, 2016