Reducing Cost, Size of PCBs with Embedded Technologies and Cadence Layout Tools

Rajesh Aiyandra, package design and simulation team leader at Dialog, explains why his company needed a tool that could help migrate from a two-layer BGA substrate to four layers and how Cadence SiP Digital Layout helped deliver a smooth migration.

上次修改時間: February 26, 2019

持續時間: 3 min