Multi-Fabric Interconnect Planning and Optimization with OrbitIO System Planner and SIP Layout

Increasing functional density as a result of the latest silicon processes combined with use of high performances interface like DDR4 or PCI Express Gen 3 necessitates coordinated interconnect planning and optimization across the fabrics of silicon, package, and PCB to ensure optimal performance, cost, and product delivery. OrbitIO™ System Planner provides a hierarchical environment that brings these fabrics together into a single canvas to facilitate dynamic planning and optimization, as well as enables communication of design intent and route plans to downstream design resources. It's ideal for system architects or anyone responsible for developing the interfaces between die, package, and PCB.

上次修改時間: June 21, 2016