STMicroelectronics - Improving Productivity with Virtuoso SPD

In this Expert Insights video, Vikas Chelani, Sr. Layout Designer of STMicroelectronics India, describes the challenge of making IP memories compact and efficient despite increased routing and logic complexities. Using Cadence® Virtuoso® Symbolic Placement of Devices (SPD) reduced both his preliminary area estimation and device placement cycles, leading to a 35% productivity gain.

上次修改時間: October 31, 2016