Verifying the RTL in an Analog Circuit

SilabTech uses digitally assisted analog techniques to create its chips. To streamline the circuit verification process, the company uses Cadence® AMS Methodology Kit, which verifies the RTL in the analog circuit. And to avoid a manual process for circuit calibration, the company uses Cadence Virtuoso® Analog Design Environment XL, which enables the engineers to evaluate tests sequentially. Ravi Mehta, co-founder and technologist at SilabTech, talks about the benefits of both solutions.

上次修改時間: May 12, 2016