Multiprotocol IP, IBIS Models, and Reference Designs for Easy Transition to LPDDR4
LPDDR4 Design IP
Semiconductor customers are faced with a number of challenges when trying to select the appropriate DDR DRAM protocol for their applications. In addition to performance and power challenges, designers must determine the best protocol for their application, making it important for suppliers to support both the latest and legacy protocols. Mobile applications, for example, may need to support LPDDR4 and LPDDR3, while some consumer applications may require more extensive support including LPDDR4/3 and DDR4/3.
When evaluating the DDR subsystem, customers are challenged with more than the obvious speed increases and lower voltages that require detailed and accurate system-level signal integrity analysis. Because there are multiple command channels and very different specifications for packaging ball assignments for the package-on-package (PoP) standards, the transition could force significant
Cadence eases the burden when transitioning from LPDDR3 to LDDR4 with IP features such as command swap and DQ swap to help system routing challenges. Our multi-protocol IP solution that supports LPDDR4/3 and DDR4/3 is ideal for addressing these challenges.
- Support any combination of LPDDR4/3 and DDR4/3
- Highly configurable multi-port memory controller
Silicon-Accurate Power-Aware IBIS Models
Silicon-correlated power-aware IBIS models are delivered with all Cadence® DDR and LPDDR PHY IP. These IBIS models are created using the Cadence Sigrity™ Transister-to-Behavior Model Conversion (T2B™) and correlated in the lab against physical measurement.
- Converts transistor driver models into highly accurate behavioral models
- Automatically generates IBIS 3.2, 4.2, or 5.0 models as well as new accuracy-enhanced models
- Dramatically improves chip/system co-simulation efficiency and capacity
Virtual Reference Designs
When demonstrating our LPDDR4 multiprotocol IP, we use a reference design that helps customers validate that our IP will perform to their expectations in their target product. An electronic version of the reference design, called a virtual reference design, is also available. Models for the IC package and PCB can be swapped in and out to best represent the target environment. Using the Sigrity simulation tools, you can test drive our IP in a virtual version of your target product.