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    • 系统设计与验证
      系统设计与验证概述

      Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.

      系统验证套件 相关产品 A-Z

      工具目录
      • 调试纠错分析
        • Tools
        • Indago Debug Platform
        • Indago Debug Analyzer App
        • Indago Embedded Software Debug App
        • Indago Protocol Debug App
        • Indago Portable Stimulus Debug App
        • SimVision Debug
      • 硬件仿真加速器
        • Tools
        • Palladium Z1 Enterprise Emulation System
        • Palladium XP Series
        • Palladium Dynamic Power Analysis
        • Palladium Hybrid
        • SpeedBridge Adapters
        • Emulation Development Kit
        • Virtual JTAG Debug Interface
        • Accelerated VIP
        • QuickCycles Services
        • VirtualBridge Adapters
      • 形式化验证与静态验证
        • Tools
        • JasperGold Formal Verification Platform (Apps)
        • Assertion-Based Verification IP
        • Incisive Formal Verification Platform
      • FPGA 原型验证
        • Tools
        • Protium S1 FPGA-Based Prototyping Platform
        • Protium FPGA-Based Prototyping
        • SpeedBridge Adapters
      • 验证规划与管理
        • Tools
        • vManager Metric-Driven Signoff Platform
      • 仿真与 Testbench 验证
        • Tools
        • Xcelium Parallel Simulator
        • Incisive Enterprise Simulator
        • Incisive Functional Safety Simulator
        • Incisive Specman Elite
      • 软件驱动验证
        • Tools
        • Perspec System Verifier
        • Indago Portable Stimulus Debug App
        • Indago Embedded Software Debug App
        • Virtual System Platform
      • 验证IP(VIP)
        • Tools
        • Accelerated Verification IP
        • Assertion-Based VIP
        • Verification IP
      • 流程
        • 流程
        • 基于 ARM 设计的验证方案
        • 汽车功能安全性验证
        • 基于覆盖率度量的验证签收
        • 混合信号验证
        • 低功耗验证方法学
    • 数字设计与Signoff
      数字设计与 Signoff 概述

      Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.

      全流程数字解决方案 相关产品 A-Z

      工具目录
      • 模块物理实现
        • Tools
        • Innovus Implementation System
        • First Encounter Design Exploration and Prototyping
      • 逻辑等效性检查
        • Tools
        • Conformal Equivalence Checker
        • Conformal Smart LEC
      • 形式验证与功能 ECO
        • Tools
        • Conformal ECO Designer
      • 分层设计与布局规划
        • Tools
        • Innovus Implementation System
        • First Encounter Design Exploration and Prototyping
      • 低功耗验证
        • Tools
        • Conformal Low Power
      • RTL 综合
        • Tools
        • Stratus High-Level Synthesis
        • Genus Synthesis Solution
      • 功耗分析
        • Tools
        • Joules RTL Power Solution
      • SDC 与 CDC 验证
        • Tools
        • Conformal Constraint Designer
      • 硅签收
        • Tools
        • Pegasus Verification System
        • Quantus Extraction Solution
        • Tempus Timing Signoff Solution
        • Assura Physical Verification
        • Physical Verification System
        • CMP Predictor
        • MaskCompose Reticle and Wafer Synthesis
        • QuickView Signoff Data Analysis
        • LDE Electrical Analyzer
        • Process Proximity
        • Pattern Analysis
        • Litho Physical Analyzer
        • Voltus IC Power Integrity Solution
        • Voltus-Fi Custom Power Integrity Solution
      • 可测性设计
        • Tools
        • Modus DFT Software Solution
      • 流程
        • 流程
        • 3D-IC
        • 先进工艺节点
        • 基于 ARM 的设计
        • 低功耗
        • 混合信号
    • 定制 IC/模拟/ RF 设计
      定制 IC /模拟/ RF 设计概述

      Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.

      概述 相关产品 A-Z

      工具目录
      • 特征库提取
        • Tools
        • Virtuoso Liberate Characterization Solution
        • Virtuoso Variety Statistical Characterization
        • Virtuoso Liberate LV Library Validation Solution
        • Virtuoso Liberate MX Memory Characterization Solution
        • Virtuoso Liberate AMS Mixed-Signal Characterization Solution
        • Spectre Accelerated Parallel Simulator
      • 电路设计
        • Tools
        • What's New in Virtuoso
        • Virtuoso Analog Design Environment
        • Virtuoso Schematic Editor
        • Virtuoso Variation Option
        • Virtuoso ADE Product Suite
        • Virtuoso ADE Explorer
        • Virtuoso ADE Assembler
        • Virtuoso ADE Verifier
      • 电路仿真
        • Tools
        • Spectre Circuit Simulator
        • Spectre eXtensive Partitioning Simulator
        • Spectre RF Option
        • Spectre AMS Designer
        • Spectre Accelerated Parallel Simulator
      • 电学感知设计(EAD)
        • Tools
        • Virtuoso Schematic Editor
        • Virtuoso Analog Design Environment
        • Virtuoso Layout Suite EAD
        • Virtuoso Digital Implementation
        • Voltus IC Power Integrity Solution
      • 版图设计
        • Tools
        • What's New in Virtuoso
        • Virtuoso Space-Based Router
        • Virtuoso Layout Suite
        • Virtuoso Layout Suite EAD
      • 版图验证
        • Tools
        • Virtuoso DFM
        • Physical Verification System
        • Virtuoso Integrated Physical Verification System
      • RF 设计
        • Tools
        • Virtuoso Visualization and Analysis
        • Quantus Extraction Solution
        • Virtuoso Schematic Editor
        • Virtuoso Analog Design Environment
        • Spectre Accelerated Parallel Simulator
        • Spectre RF Option
      • 工程漂移感知
        • Tools
        • Spectre Accelerated Parallel Simulator
        • Spectre Circuit Simulator
        • Spectre Extensive Partitioning Simulator
        • Virtuoso ADE Assembler
        • Virtuoso Variation Option
      • 建模
        • Tools
        • Virtuoso Schematic Editor
        • Virtuoso Analog Design Environment
        • Virtuoso AMS Designer
      • 流程
        • 流程
        • 特征库提取
        • 电路设计
        • 电学感知设计(EAD)
        • 先进工艺节点
        • Virtuoso System Design Platform
        • Legato Memory Solution
    • IC 封装设计与分析
      IC 封装设计与分析概述

      Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.

      概述 相关产品 A-Z

      工具目录
      • IC 封装设计
        • Tools
        • SIP Layout
        • Allegro Package Designer
        • 3D Design Viewer
        • SiP Layout Advanced WLP Option
        • SiP Digital Architect
      • SI/PI 协同分析方案
        • Tools
        • Allegro Sigrity SI Base
        • Allegro Sigrity Power-Aware SI Option
        • Allegro Sigrity Serial Link Analysis Option
        • Allegro Sigrity Package Assessment and Extraction Option
        • Allegro Sigrity PI Base
        • Allegro Sigrity PI Signoff and Optimization Option
      • SI/PI 分析点工具
        • Tools
        • Sigrity PowerSI
        • Sigrity PowerDC
        • Sigrity OptimizePI
        • Sigrity System Explorer
        • Sigrity Speed2000
        • Sigrity SystemSI
        • Sigrity Broadband SPICE
        • Sigrity Transistor-to-Behavioral Model Conversion (T2B)
        • Sigrity XtractIM
        • Sigrity XcitePI Extraction
      • 跨平台协同设计与分析
        • Tools
        • OrbitIO Interconnect Designer
        • IO-SSO Analysis Suite
      • 流程
        • 流程
        • Cross-Substrate互连
        • IC/封装/PCB协同设计
        • InFO封装技术
        • Sigrity最新技术
        • Virtuoso System Design Platform
        • PDN设计
    • PCB 设计与分析
      PCB 设计与分析概述

      Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.

      概述 相关产品 A-Z 生态服务搜索

      工具目录
      • 原理图设计
        • Tools
        • Allegro Design Entry Capture/Capture CIS
        • Allegro Design Publisher
        • Allegro Design Authoring
        • Allegro FPGA System Planner
      • PCB 版图设计
        • Tools
        • Allegro PCB Designer
        • OrCAD PCB Designer
      • 库与设计数据管理
        • Tools
        • Allegro ECAD-MCAD Library Creator
        • Allegro EDM Solution
        • Allegro PCB Librarian
        • Allegro Pulse
      • 模拟/混合信号仿真
        • Tools
        • Allegro PSpice Simulator
        • OrCAD PSpice Designer
      • SI/PI 协同分析方案
        • Tools
        • Allegro Sigrity Serial Link Analysis Option
        • Allegro Sigrity SI Base
        • Allegro Sigrity PI Base
        • Allegro Sigrity Power-Aware SI Option
        • Allegro Sigrity PI Signoff and Optimization Option
      • SI/PI 分析点工具
        • Tools
        • Sigrity PowerSI
        • Sigrity PowerDC
        • Sigrity OptimizePI
        • Sigrity System Explorer
        • Sigrity SystemSI
        • Sigrity Speed2000
        • Sigrity Broadband SPICE
        • Sigrity Transistor-to-Behavioral Model Conversion (T2B)
        • Sigrity PowerSI 3D EM Extraction Option
      • 流程
        • 流程
        • Allegro最新技术
        • Sigrity最新技术
        • 产品创建
        • ECAD MCAD 协同设计
        • IO-SSO分析套件
        • PDN设计
        • LPDDR4 完整分析方案
        • 功耗感知信号完整性分析
        • 接口感知方法
        • Sigrity串行链路分析
    • 所有开发工具
    • 资源库
  • IP
    • Cadence IP 主页

      这是一个开放的 IP 平台帮助您的APP驱动的 SoC 实现客户化设计

      了解更多

    • Tensilica 处理器 IP
    • 接口 IP
    • Denali 存储器 IP
    • 模拟 IP
    • 系统/外设 IP
    • 验证 IP
  • 解决方案
    • 解决方案主页

      全面的解决方案与实现方法

      了解更多

    • 3D-IC 设计
    • 先进工艺节点
    • 汽车电子解决方案
    • 低功耗
    • 混合信号
    • 光学
    • Arm 解决方案
    • 航天与国防
  • 技术服务
    • 技术服务概要

      帮助您实现广泛的商业目标

      了解更多

    • 设计服务
    • 培训
    • 托管设计解决方案
    • 设计方法学服务
    • 虚拟集成化计算机辅助设计 (VCAD)
  • 支持与培训
    • 技术支持
      支持概要

      24小时全球范围的技术支持。

      了解更多 登录技术支持

      • 支持流程
        • 24/7 Support - Cadence Online Support

          Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.

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        • Software Downloads

          Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.

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      • Computing Platform Support
        • 24/7 Support - Cadence Online Support

          Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.

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        • Software Downloads

          Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.

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      • 客户支持联系人
        • 24/7 Support - Cadence Online Support

          Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.

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        • Software Downloads

          Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.

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    • Cadence 学术网络
      CAN Overview

      The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.

      More

      • 学术合作
        • Participate in CDNLive

          A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.

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        • Come & Meet Us @ Events

          A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.

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      • 大学软件项目
        • Americas University Software Program

          Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.

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        • EMEA University Software Program

          In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.

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      • 大学招聘
        • Apply Now For Jobs

          If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.

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        • Cadence is a Great Place to do great work

          Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.

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    • 全球培训课程目录
    • Custom IC / Analog / RF Design
      Training Overview

      Get the most out of your investment in Cadence technologies through a wide range of training offerings.

      Overview All Courses Asia Pacific EMEANorth America

      Tools Categories
      • Advanced Nodes (ICADV)
        • Featured Courses
        • Virtuoso Layout for Advanced Nodes
        • Virtuoso Layout for Advanced Nodes: T2 Electromigration
      • Circuit Design and Simulation
        • Featured Courses
        • Virtuoso ADE Explorer Series
        • Virtuoso ADE Assembler Series
        • Virtuoso ADE Verifier
        • Variation Analysis Using the Virtuoso ADE Assembler
        • Virtuoso Schematic Editor
        • Mixed Signal Simulations Using AMS Designer
        • Spectre Accelerated Parallel Simulator
        • High-Performance Simulation Using Spectre Simulators
        • Additional Courses
      • Electrically-Aware Design
        • Featured Courses
        • High-Performance Simulation Using Spectre Simulators
        • Physical Verification System
        • Virtuoso Analog Design Environment
        • Virtuoso Electrically-Aware Design with Layout-Dependent Effects
        • Virtuoso Schematic Editor
      • Infrastructure
        • Featured Courses
        • Advanced SKILL Language Programming
        • SKILL Development of Parameterized Cells
        • SKILL Language Programming
        • SKILL Language Programming Introduction
        • SKILL Programming for IC Layout Design
      • Layout Design and Verification
        • Featured Courses
        • Virtuoso Layout for Advanced Nodes
        • Virtuoso Layout Pro Series
        • Virtuoso Space-Based Router
        • Virtuoso Floorplanner
        • Quantus QRC Extraction Series
        • Virtuoso Abstract Generator
        • Using Virtuoso Constraints Effectively
        • Virtuoso Connectivity-Driven Layout Transition
        • Virtuoso Layout Design Basics
        • Physical Verification System
      • Library Characterization
        • Featured Courses
        • Cadence Library Characterization and Validation
        • Virtuoso Liberate MX for Memory Characterization
        • Cadence Variety Statistical Library Characterization
      • Modeling
        • Featured Courses
        • Analog Modeling with Verilog-A
        • Behavioral Modeling with VHDL-AMS
        • Behavioral Modeling with Verilog-AMS
        • Mixed Signal Simulations Using AMS Designer
        • Real Modeling with SystemVerilog
        • Real Modeling with Verilog-AMS
      • RF Design
        • Featured Courses
        • Quantus QRC Transistor-Level T1: Overview and Technology Setup
        • Quantus QRC Transistor-Level T2: Parasitic Extraction
        • Quantus QRC Transistor-Level T3: Extracted View Flows and Advanced Features
        • Spectre Accelerated Parallel Simulator
        • Virtuoso Schematic Editor
        • Spectre Accelerated Parallel Simulator
        • Spectre RF Analysis using Harmonic Balance
      • Variation Aware Design
        • Featured Courses
        • Virtuoso ADE Assembler S1: Introducing the Assembler Environment
        • Virtuoso ADE Assembler S2: Sweeping Variables, Simulating Corners, and Creating Run Plans
        • Virtuoso ADE Assembler S3: Circuit Checks, Device Asserts, and Reliability Analysis
        • Variation Analysis Using the Virtuoso ADE Assembler
        • Virtuoso Spectre Pro Series
        • High-Performance Simulation Using Spectre Simulators
      • Delivery Methods
        • Instructor-Led Training

          Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.

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        • Online Training

          Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.

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    • Languages and Methodologies
      Training Overview

      Get the most out of your investment in Cadence technologies through a wide range of training offerings.

      Overview All Courses Asia Pacific EMEANorth America

      Tools Categories
      • Assertions
        • Featured Courses
        • SystemVerilog Assertions
        • Verification with PSL
      • Behavioral Language for AMS Simulation
        • Featured Courses
        • Behavioral Modeling with VHDL-AMS
        • Behavioral Modeling with Verilog-AMS
        • Real Modeling with SystemVerilog
        • Real Modeling with Verilog-AMS
      • Scripting
        • Featured Courses
        • Perl for EDA Engineering
        • Tcl Scripting for EDA
      • Specman and UVMe
        • Featured Courses
        • Specman Advanced Training
        • Specman Fundamentals for Block-Level Environment Developers
      • SystemC
        • Featured Courses
        • C++ Language Fundamentals for Design and Verification
        • SystemC Language Fundamentals
        • SystemC Synthesis with Stratus HLS
        • SystemC Transaction-Level Modeling (TLM 2.0)
      • SystemVerilog and UVM
        • Featured Courses
        • Real Modeling with SystemVerilog
        • SystemVerilog Accelerated Verification with UVM
        • SystemVerilog Advanced Register Verification Using UVM
        • SystemVerilog Assertions
        • SystemVerilog for Design and Verification
        • SystemVerilog for Verification
      • Verilog and VHDL
        • Featured Courses
        • VHDL Language and Application
        • Verification with PSL
        • Verilog Language and Application
        • Verilog for VHDL Users
      • Delivery Methods
        • Instructor-Led Training

          Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.

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        • Online Training

          Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.

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    • Digital Design and Signoff
      Training Overview

      Get the most out of your investment in Cadence technologies through a wide range of training offerings.

      Overview All Courses Asia Pacific EMEANorth America

      Tools Categories
      • Block and Hierarchical Implementation
        • Featured Courses
        • Analog-on-Top Mixed-Signal Implementation
        • Encounter Digital Implementation (Block)
        • Encounter Digital Implementation (Hierarchical)
        • Innovus Implementation System (Block)
        • Innovus Implementation System (Hierarchical)
        • Low-Power Flow with Encounter Digital Implementation
        • Additional Courses
      • Equivalence Checking
        • Featured Courses
        • Conformal Low-Power Verification
        • Encounter Conformal ECO
        • Logic Equivalence Checking with Conformal EC
        • Logic Equivalence Checking with Encounter Conformal EC
        • Low-Power Verification with Encounter Conformal
      • Layout Design
        • Featured Courses
        • Virtuoso Digital Implementation
      • Silicon Signoff
        • Featured Courses
        • Basic Static Timing Analysis
        • Tempus Signoff Timing Analysis and Closure
        • Voltus Power-Grid Analysis and Signoff
      • Synthesis
      • Test
        • Featured Courses
        • Test Synthesis Using Encounter RTL Compiler
      • Delivery Methods
        • Instructor-Led Training

          Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.

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        • Online Training

          Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.

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    • IC Package Design and Analysis
      Training Overview

      Get the most out of your investment in Cadence technologies through a wide range of training offerings.

      Overview All Courses Asia Pacific EMEANorth America

      Tools Categories
      • Cross-Platform Co-Design and Analysis
        • Featured Courses
        • OrbitIO System Planner
        • SiP Layout
      • IC Package Design
        • Featured Courses
        • Allegro Package Designer
        • SiP Layout
      • SI/PI Analysis Integrated Solution
        • Featured Courses
        • Allegro Sigrity PI
        • Allegro Sigrity Package Assessment and Model Extraction
        • Allegro Sigrity SI Foundations
        • Sigrity PowerDC and OptimizePI
        • Sigrity PowerSI for Model Generation and Analysis
      • SI/PI Analysis Point Tools
        • Featured Courses
        • Allegro Sigrity Package Assessment and Model Extraction
        • Sigrity PowerDC and OptimizePI
        • Sigrity PowerSI for Model Generation and Analysis
      • Delivery Methods
        • Instructor-Led Training

          Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.

          Read more

        • Online Training

          Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.

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    • PCB Design and Analysis
      Training Overview

      Get the most out of your investment in Cadence technologies through a wide range of training offerings.

      Overview All Courses Asia Pacific EMEANorth America

      Tools Categories
      • Analog/Mixed-Signal Simulation
        • Featured Courses
        • Allegro AMS Simulator
        • Allegro AMS Simulator Advanced Analysis
        • Analog Simulation with PSpice
        • Analog Simulation with Pspice Advanced Analysis
      • Design Authoring
        • Featured Courses
        • Allegro Design Entry HDL Basics
        • Allegro Design Entry HDL Front-to-Back Flow
        • Allegro Design Entry HDL SKILL Programming Language
        • Allegro Design Entry Using OrCAD Capture
        • Allegro Design Reuse
        • Allegro System Architect
        • Allegro Team Design Authoring
      • Library and Design Data Management
        • Featured Courses
        • Allegro Design Workbench for Administrators
        • Allegro Design Workbench for Engineers and Designers
        • Allegro Design Workbench for Librarians
        • Allegro PCB Librarian
      • PCB Layout
        • Featured Courses
        • Allegro High-Speed Constraint Management
        • Allegro PCB Editor Basic Techniques
        • Allegro PCB Editor Intermediate Techniques
        • Allegro PCB Editor SKILL Programming Language
        • Allegro PCB Router Basics
      • SI/PI Analysis Integrated Solution
        • Featured Courses
        • Allegro Sigrity PI
        • Allegro Sigrity SI Foundations
        • Sigrity PowerDC and OptimizePI
        • Sigrity PowerSI for Model Generation and Analysis
      • SI/PI Analysis Point Tools
        • Featured Courses
        • Sigrity PowerDC and OptimizePI
        • Sigrity PowerSI for Model Generation and Analysis
      • Delivery Methods
        • Instructor-Led Training

          Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.

          Read more

        • Online Training

          Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.

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    • System Design and Verification
      Training Overview

      Get the most out of your investment in Cadence technologies through a wide range of training offerings.

      Overview All Courses Asia Pacific EMEANorth America

      Tools Categories
      • Emulation and Acceleration
        • Featured Courses
        • Acceleration with Palladium XP
        • In Circuit Emulation with Palladium XP
        • Protium Rapid Prototyping Platform
      • Formal Verification
        • Featured Courses
        • JasperGold Formal Fundamentals
        • SystemVerilog Assertions
        • Verification with PSL
      • Planning and Management
        • Featured Courses
        • Foundations of Metric Driven Verification
        • Incisive Comprehensive Coverage with IMC
        • Metric Driven Verification using Incisive vManager
      • Scripting
        • Featured Courses
        • Perl for EDA Engineering
        • Tcl Scripting for EDA
      • Simulation, Testbench and Debug
        • Featured Courses
        • Xcelium Simulator
        • Xcelium Integrated Coverage
        • Incisive Functional Safety Simulator
        • Incisive Simulation Performance Optimization
        • Low-Power Simulation with IEEE Std 1801 UPF
        • Indago Debug Analyzer App
      • Specman and UVMe
        • Featured Courses
        • Specman Advanced Training
        • Specman Fundamentals for Block-Level Environment Developers
      • SystemC
        • Featured Courses
        • C++ Language Fundamentals for Design and Verification
        • SystemC Language Fundamentals
        • SystemC Synthesis with Stratus HLS
        • SystemC Transaction-Level Modeling (TLM 2.0)
      • SystemVerilog and UVM
        • Featured Courses
        • Real Modeling with SystemVerilog
        • SystemVerilog Accelerated Verification with UVM
        • SystemVerilog Advanced Register Verification Using UVM
        • SystemVerilog Assertions
        • SystemVerilog for Design and Verification
        • SystemVerilog for Verification
      • Verilog and VHDL
        • Featured Courses
        • VHDL Language and Application
        • Verification with PSL
        • Verilog Language and Application
        • Verilog for VHDL Users
      • Delivery Methods
        • Instructor-Led Training

          Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.

          Read more

        • Online Training

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  • Allegro Sigrity Serial Link Analysis Option

Allegro Sigrity Serial Link Analysis Option

Complete solution for analysis of multi-gigabit serial links

Allegro Sigrity Serial Link Analysis Option Datasheet

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Key Benefits

  • Accelerates time to design, lowers overall cost
  • Enables bit error rate (BER) prediction
  • Integrates with Cadence PCB and IC package layout editors and Allegro Design Authoring

You can start using the Cadence® Allegro® Sigrity™ Serial Link Analysis Option at the earliest stages of design, before schematic netlists and physical layouts are available. For example, begin by performing feasibility studies with full die-to-die channel topologies for the serial link of interest using a transmission line editor, a via creation tool, and sample AMI models.

As the design progresses, you can replace pre-layout models with more detailed extracted models in a top-down methodology. When IBIS-AMI models are not available, use a wizard-based approach to choose equalization techniques to create representative models (requires access to C compiler) for use in Cadence tools.

For interconnect modeling, you can use the tool’s accurate field solver engines to create detailed post-layout S-parameter extraction of physical layout, and populate blocks in the schematic simulation environment. If you’d like to accelerate simulation time and enhance convergence, you can convert these S-parameters to SPICE sub-circuits.

Features

  • Easy-to-use block-level schematic simulation environment
  • High-capacity channel simulation
  • Hybrid solver for efficient S-parameter extraction of large interconnect structures
  • 3D full-wave solver for detailed extraction of high-frequency structures
  • S-parameter tuning, checking, and Broadband SPICE® model conversion
  • Electrical compliance checking against multi-gigabit standard specifications
  • Enables a single user access to the following Sigrity products in either point tool mode or as an integrated Allegro Sigrity solution:
    • Sigrity Broadband SPICE
    • Sigrity T2B™
    • Sigrity PowerSI™
    • Sigrity PowerSI 3D EM Extraction Option
    • Sigrity SystemSI™—Serial Link Analysis

REQUEST A DEMO

Learn how Ericsson more easily verified their design to meet DDR and PCIe specs while avoiding crosstalk by simulating and verifying using Sigrity™ solution with the IBIS/AMI virtual reference design for interface compliance signoff.

  • Related Products

    • Allegro Sigrity SI Base
    • Sigrity Broadband SPICE
    • Sigrity Transistor-to-Behavioral Model Conversion (T2B)
    • Allegro Sigrity Power-Aware SI Option
    • Sigrity PowerSI 3D EM Extraction Option
    • Sigrity SystemSI
    • Sigrity PowerSI
  • Related Information

    • Sigrity Tech Tips
Resource Library VIEW ALL

Press Releases (4)

  • Cadence Sigrity 2017 Delivers Fast Path to PCB Power Integrity Signoff
  • Cadence Sigrity 2016 Portfolio Improves Product Creation Time with PCB Design and Analysis Methodology for Multi-Gigabit Interfaces
  • Cadence and Spreadtrum Collaborate on Virtual Reference Design Kit to Reduce Customers' Design Cycle by Up to 12 Weeks
  • Cadence Expands Sigrity 2015 Technology Portfolio with New Products, a Key Feature Update and Flexible Licensing Options

Conference Paper (1)

  • System Signal Integrity Expands into the Lab

Success Story Video (2)

  • Ericsson Meets DDR and PCIe Specs While Avoiding Crosstalk
  • Lattice Saves Millions, Avoids Respins and Product Delays with Sigrity Tools
Videos

Lattice Saves Millions, Avoids Respins and Product Delays with Sigrity Tools

System Signal Integrity Expands into the Lab

Sigrity Tech Tip: How to Build an IBIS-AMI Model

Sigrity Tech Tip: How to Accelerate Accurate 3D Full Wave Extraction Time

Sigrity Tech Tip: How to Accurately Model a Multi-Gigabit Serial Link 10 Times Faster

Ericsson Meets DDR and PCIe Specs While Avoiding Crosstalk

Embedded World: Enabling Automotive System Design with Allegro Sigrity Tools

News ReleasesVIEW ALL
  • Cadence Sigrity 2017 Delivers Fast Path to PCB Power Integrity Signoff 01/25/2017

  • Cadence Sigrity 2016 Portfolio Improves Product Creation Time with PCB Design and Analysis Methodology for Multi-Gigabit Interfaces 01/19/2016

  • Cadence and Spreadtrum Collaborate on Virtual Reference Design Kit to Reduce Customers' Design Cycle by Up to 12 Weeks 12/01/2015

  • Cadence Expands Sigrity 2015 Technology Portfolio with New Products, a Key Feature Update and Flexible Licensing Options 01/26/2015

BlogsVIEW ALL
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