At Nexus Technology, Joe Socha, signal integrity engineer, is responsible for analyzing tiny PCBs that are used as interposers between memory devices and their target systems. Probing memory devices can be difficult, but an interposer allows the engineer to gain signal access. In devices such as DDR4 and LPDDR4, there are electrical and mechanical challenges that Nexus manages by using Cadence® Allegro® and Sigrity™ tools. In this video, Socha talks about how the Cadence Sigrity PowerSI® tool enables the team to run what-if cases to gain insights that lead to useful changes in trace widths, impedance, and more.
上次修改时间: October 17, 2018
持续时间: 3 min