SAN JOSE, Calif., 04 Apr 2016
- Next-generation Virtuoso ADE enables engineers to explore, analyze and verify designs against goals to ensure that design intent is maintained throughout the design cycle
- Virtuoso Layout Suite offers up to 100X accelerated zoom, pan, drag and draw performance on large layouts
For more information on the Virtuoso ADE product suite, please visit www.cadence.com/news/virtuosoade, and for more information on the Virtuoso Layout Suite, go to www.cadence.com/news/virtuosols.
Next-Generation Virtuoso ADE Product Suite
The next-generation Cadence Virtuoso ADE product suite addresses the challenges that come with the emergence of new industry standards, advanced-node designs and the requirements for system design, enabling engineers to fully explore, analyze and verify designs to ensure that design intent is maintained throughout the design cycle. Enhanced data handling provides up to 20X improvement in loading waveform databases in excess of 1GB and a 50X improvement in versioning and loading set-up files into the environment. The suite's key technologies include:
- Virtuoso ADE Explorer: Enables fast and accurate real-time tuning of design specs, provides pass/fail datasheets and delivers a complete corners and Monte Carlo statistical environment for detecting and fixing variation problems
- Virtuoso ADE Assembler: Enables engineers to analyze their designs under various process-voltage-temperature (PVT) combinations; also offers GUI-based verification plans so designers can easily create conditional and dependent simulations
- Virtuoso ADE Verifier: Provides a substantial technological advancement in analog verification, offering an integrated dashboard that lets engineers easily verify that all of the blocks are contributing to the overall design specifications
"The new Virtuoso ADE Verifier technology and the Virtuoso ADE Assembler technology run plan capability make our design teams more productive," said Yanqiu Diao, deputy general manager, Turing Processor business unit at HiSilicon Technologies Co., Ltd. "Through our early use of the new Cadence Virtuoso ADE product suite, we've found that we can improve analog IP verification productivity by approximately 30 percent and reduce verification issues by one-half. Our smartphone and network chip projects should benefit from these latest capabilities."
Virtuoso Layout Suite Enhancements
The enhanced Virtuoso Layout Suite addresses the most complex layout challenges by offering accelerated performance and productivity for custom analog, digital and mixed-signal designs at the device, cell, block and chip levels. The suite's latest updates provide the following enhancements:
- Graphics rendering performance: Provides from 10X to 100X accelerated zoom, pan, drag and draw performance on large layouts
- Module Generator (ModGen): Interactive pattern manipulation flow that makes real-time customization of ModGens very visual and simple; also now supports synchronous clones, which are layout elements with identical physical properties-like width and length of transistors-that the layout designer can layout once and reuse
- New structured device-level routing: Structured device-level routing capabilities can enhance routing productivity by as much as 50 percent
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at www.cadence.com.
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