Cadence is committed to keeping design teams highly productive. A range of support offerings and processes helps Cadence users focus on reducing time-to-market and achieving silicon success. Overview
- Instantaneous DRC checks using foundry-certified PVS DRC rule deck
- One-button click for in-design signoff DRC in Virtuoso platform
- Improved layout designer productivity and reduced DRC verification re-spins
At advanced nodes, traditional design rule checking (DRC) does not scale for layout verification. That’s where Cadence® Virtuoso® Integrated Physical Verification System (IPVS) comes in.
To bridge the gap and improve productivity between the custom implementation and physical verification tools, Virtuoso IPVS delivers instantaneous signoff DRC checks to guide designers to a correct-by construction flow. Virtuoso IPVS integrates foundry-qualified PVS DRC rules decks into Virtuoso Layout Suite in an interactive "instantaneous" mode. Layout engineers just click a button and Virtuoso IPVS runs the signoff DRC check on the prescribed area and returns the DRC results back within seconds. The tool displays DRC results as markers in the layout and delivers productivity improvements of at least 15% at mature nodes and greater than 50% at advanced nodes.
Get the most out of your investment in Cadence technologies through a wide range of training offerings. We offer instructor-led classes at our training centers or at your site. We also offer self-paced online courses. Overview