Tapping Into UVM-ML to Support Reuse in Multi-Language Verification Environment

What do you do when you've got an SoC verification project involving a testbench with a mix of different languages? In this 1.5-minute clip, Mike Bartley, CEO of Test and Verification Solutions, talks about how using open-source UVM-ML has allowed his team to reuse its legacy multi-language verification environment in a new UVM testbench environment. The team was able to wrap its Cadence® Incisive® Enterprise Specman Elite® Testbench in a UVM framework.

마지막 수정 날짜: June 15, 2016

지속 시간: 12 min