How Real Number Modeling Improves Functional Verification for Mixed-Signal SoCs

Functional verification is particularly challenging for mixed-signal SoCs. In this 3-minute video, Dushyant Juneja, a CAD engineer at Analog Devices, talks about early bug detection and more thorough functional verification of the company's mixed-signal and low-power designs. The company achieved this by applying advanced methodology based on real number modeling and simulation in Cadence® Incisive® Enterprise Simulator.

마지막 수정 날짜: June 15, 2016

지속 시간: 3 min