DDR4 Power-Aware Signal Integrity Adopting Serial Link Simulation Techniques
Discussion on DQ Rx Mask Support in SystemSI for DDR4. BER Analysis for DDR4 Interfaces commonly applied to multi-gigabit serial links, requires channel simulation for high capacity, enables jitter noise injection, AMI modeling for equalization, non ideal power effects can also be included.
最終変更: August 16, 2016
期間: 8 min