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Digital IC Design Online Training Course Collection

Digital IC Design Online Training Course Collection

Online Courses

Version	Region
	North America	ENROLL
	Other Regions	EXPRESS INTERESTINQUIRE

Course Description

Training can help you get the most of your Cadence investment and now you can subscribe to to the entire Digital IC Design online library in one simple step. The Cadence Digital Online Training Course Collection gives you access to all of self-paced courses in the Digital IC Design training catalog. The Digital IC Design Online Training Course Collection includes ALL of the courses listed:

Advanced Synthesis with Encounter RTL Compiler
Advanced Synthesis with Genus Synthesis Solution
Basic Static Timing Analysis
Conformal ECO
Conformal Low-Power Verification
Design for Test Fundamentals
Encounter Digital Implementation (Block)
Encounter Digital Implementation (Hierarchical)
Encounter RTL Compiler
Fundamentals of IEEE 1801 Low-Power Specification Format
Genus Synthesis Solution
Genus Synthesis Solution with Stylus Common UI
Innovus Implementation System (Block)
Innovus Implementation System (Hierarchical)
Joules™ Power Calculator
Logic Equivalence Checking with Conformal EC
Low-Power Flow with Encounter Digital Implementation
Low-Power Flow with Innovus Implementation System (Libraries not included)
Low-Power Synthesis Flow with Encounter RTL Compiler
Low-Power Synthesis Flow with Genus Synthesis Solution (Libraries not included)
Tempus Signoff Timing Analysis and Closure
Tempus Signoff Timing Analysis and Closure with Stylus Common UI
Test Synthesis Using Encounter RTL Compiler
Test Synthesis Using Genus Synthesis Solution
Virtuoso Digital Implementation

Course ID: 85077

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Genus Synthesis Solution v16.1

This online class features the Cadence® Genus™ Synthesis Solution with next generation synthesis capabilities and how SoC design productivity gap is filled by Genus

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INSTRUCTOR-LED TRAINING

Incisive SystemC, VHDL, and Verilog Simulation

This class teaches you to use the Incisive® mixed-language simulator to run event-driven digital simulation in one of three languages: SystemC, VHDL, or Verilog

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ONLINE COURSE

Indago Debug Analyzer App v15.2

This online class teaches you the advantage of debugging in post-process mode, but with all the functionality of an interactive debug flow

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Digital Design and Signoff
Custom IC / Analog / RF Design
IC Package Design and Analysis
PCB Design and Analysis
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