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- Runs natively on Arm-based servers, reducing overall SoC verification time and costs
- Ideally suited to the high core count typical of Arm-based servers for faster IP regression
- 3X – 10X faster regression cycle time in the critical final days and weeks of a project cycle
Verifying that system-on-chip (SoC) designs function correctly prior to manufacturing is a massive task requiring high-performance computing (HPC). Engineers have multiple means to address this problem because verifying every state isn’t reasonable, but the most pervasive technology underlying these approaches is logic simulation.
Accounting for over 70% of the EDA compute workload, SoC verification is a key driver for growth and transformation of the datacenter. Datacenters need energy-efficient platforms optimized for improved performance of a variety of different workloads that can be deployed and managed as cost effectively as possible. Arm®-based server datacenters can leverage tens of thousands of multi-core CPUs to execute massive numbers of HPC workloads, such as those needed to verify SoCs for mobile, IoT, cloud, 5G, and other applications.
An Ecosystem of Companies Solving your Compute Needs for SoC Verification
Cadence has been working with Arm, Cavium, and Qualcomm to solve the compute needs of SoC verification on Arm-based server datacenters. Verification jobs generally fall into two classes. The first is short tests that are used to verify IP blocks. These tend to run easily on one core and address a fraction of the server memory, which means each core in a server can run one of the jobs and get high throughput. The other class is huge jobs that run for hours to weeks and take most or all of the memory on a server. For these jobs, they either run on a single core and consume the entire memory of the server or, with Cadence® Xcelium™ multi-core simulation, the job can be distributed across multiple cores so it runs faster.
Applying Xcelium Simulation and Arm Servers
Having Xcelium Parallel Logic Simulation running natively on Arm-based servers further extends the capacity and power benefits by more efficiently executing both high-throughput and long-latency workloads to reduce overall SoC verification time and costs. Xcelium simulation provides both a faster single-core engine, to speed up each workload in the high-throughput test group, and a multi-core engine, to reduce the runtime of long-latency workloads. As a result, Xcelium simulation is ideally suited to the high core count typical of Arm-based servers. For high-throughput tests, the high core count means that projects can run more tests in parallel on a given set of servers, so project teams can achieve better overall SoC quality and faster turnaround time to quality bug fixes. For long-latency tests, where Xcelium simulation is able to scale to all of the cores available on a server, this means 3X to 10X faster regression cycle time in the critical final days and weeks of a project cycle.
By porting Xcelium simulation to Arm-based servers, Cadence is providing the electronics industry with the tooling that can exploit innovative HPC servers to speed the verification of their SoCs.
Press Releases (5)
- Cadence and Arm Deliver First SoC Verification Solution for Low-Power, High-Performance Arm-Based Servers
- Cadence Achieves TÜV SÜD’s First Comprehensive “Fit for Purpose - TCL1” Certification in Support of Automotive ISO 26262 Standard
- Teradyne Standardizes on Cadence Xcelium Parallel Logic Simulator
- Cadence Launches Protium S1 FPGA-Based Prototyping Platform for Early Software Development
- Cadence Launches Xcelium Parallel Simulator, the Industry’s First Production-Proven Parallel Simulator
Collaborating with Cadence on the Xcelium simulator is a key milestone in accelerating the electronic design ecosystem for Arm-based servers. The flexibility of the Arm architecture will create new opportunities for more compute core density for EDA workloads, enabling high-performance parallel simulation …
Drew Henry, Senior Vice President and General Manager, Infrastructure Business Unit at Arm
Our collaboration with Cadence is the first step toward a shared vision of leveraging the Qualcomm Centriq™ 2400 processor for the simulation needs of HPC applications. Qualcomm Centriq 2400, the world’s first 10nm server processor, delivers a large number of high performant cores that are uniquely suited for Cadence …
Ram Peddibhotla, VP of Product Management, Qualcomm Datacenter Technologies, Inc.
Availability of the Cadence Xcelium Parallel Logic Simulator on ThunderX2 platforms opens up an additional serviceable market for high-performance EDA applications to Arm servers. The Xcelium simulator benefits from high single core performance and excellent scaling across large number of ThunderX2 cores …
Gopal Hegde, VP/GM Datacenter Processor Group at Cavium
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