- Comprehensive solution improves SoC quality and performance
- Dependable results enable predictable verification schedules
- Consistent and easy-to-use products boost productivity
The most time-consuming aspect of system-on-chip (SoC) functional verification is often the creation of a testbench that accurately stimulates and responds to the interfaces on the design under test. Since a typical SoC contains dozens of standard interfaces and multiple, layered interconnect fabrics, Verification IP (VIP) provides a huge benefit by modeling all those interfaces as components that can be plugged into a testbench and simulated along with the design under test. This offloads a substantial amount of work from the verification engineer, saving time and improving product quality.
Many SoCs now employ sophisticated interconnect fabric IP to link multiple processor cores, caches, memories, and dozens of other IP blocks. These interconnect fabrics are enabling new generations of low-power servers and high-performance mobile devices. However, the added complexity of these interconnect fabrics requires VIP solutions to verify data integrity and SoC performance in addition to protocol compliance.
Cadence® Verification IP for ARM® AMBA® protocols is a complete SoC verification solution providing:
- Protocol compliance with simulation VIP and assertion-based VIP
- Data integrity analysis with Interconnect Validator
- Performance verification with Interconnect Workbench
- Simplified debugging with Indago Protocol Debug App
- Hardware/software verification with accelerated VIP
Cadence VIP for AMBA protocols has been expanding and improving over more than 10 years. Hundreds of customers have verified thousands of AMBA-based designs with Cadence VIP.