- System Design and Verification (56)
- Custom IC - Analog - RF Design (32)
- Digital Design and Signoff (24)
- Innovus Implementation System (23)
- Tempus Timing Signoff Solution (23)
- Quantus QRC Extraction (22)
- Protium FPGA-Based Prototyping Platform (20)
- Voltus IC Power Integrity Solution (18)
- Genus Synthesis Solution (16)
- FPGA-based Prototyping (15)
- Flows SDV (15)
- Power-Aware Verification Methodology (15)
- Silicon Signoff (11)
- Protium S1 FPGA-Based Prototyping Platform (10)
- Incisive vManager Solution (10)
- Simulation and Testbench Verification (10)
- Virtuoso ADE Product Suite (10)
- Palladium XP Series (10)
- Liberate Trio Characterization Suite (10)
- Legato Reliability Solution (10)
- Block Implementation (9)
- Physical Verification System (9)
- Voltus-Fi Custom Power Integrity Solution (9)
- Virtuoso Schematic Editor (9)
- Virtuoso Layout Suite (9)
- Palladium Z1 Series (9)
- Flows (9)
- Incisive Enterprise Simulator (8)
- Virtuoso ADE Explorer (8)
- Virtuoso Analog Design Environment (8)
- Palladium Dynamic Power Analysis (8)
- Virtuoso ADE Verifier (8)
- Acceleration and Emulation (8)
- Virtuoso Liberate AMS (8)
- Virtuoso Liberate MX (8)
- Virtuoso ADE Assembler (8)
- Modus Test Solution (7)
- Flows (7)
- Palladium Hybrid (7)
- Spectre Accelerated Parallel Simulator (7)
- Conformal Low Power (6)
- JaperGold Verification Platform (6)
- Virtuoso Liberate (6)
- Allegro FPGA System Planner (6)
- Virtuoso Liberate LV (6)
- PCB Design and Analysis (6)
- Circuit Simulation (6)
- Spectre Circuit Simulator (6)
297 Result(s) Found
Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence® digital full flow has achieved certification for the Samsung Foundry 5nm Low-Power Early (5LPE) process with Extreme Ultraviole...
02 Jul 2019
NSITEXE Accelerates Delivery of Data Flow Processor IP for Automotive and Industrial Applications Using the Cadence Digital Design Full Flow
Cadence announced that NSITEXE, Inc. deployed the Cadence digital design full flow to accelerate the delivery of its high-efficiency, high-quality data flow processor (DFP) IP for automotive and industrial...
11 Jul 2019
Frank Schirrmeister from Cadence Design Systems presents in the US Pavillion at the 53rd Paris International Airshow on 20th June 2019 promoting Cadence solutions for Intelligent System Design in Aerospace...
17 Jul 2019
When it comes to designing and verifying aerospace- and military-grade applications, the stakes are even higher given their mission-critical nature. You need to ensure rock-solid systems security, comply w...
18 Jul 2019
In this week's Whiteboard Wednesdays episode, Megha Daga describes the new Tensilica DNA 100 Processor IP for on-device AI. This AI processor delivers industry leading high performance and power efficiency...
25 Jun 2019
Cadence announced the launch of its new Cadence Cloud Passport Partner Program to give customers a proven and easier path to the cloud when their internal IT teams desire assistance.
03 Jun 2019
This live demonstration shows an example of an AI-based pedestrian detection used for ADAS applications. The incoming live video images are streamed into the CPU and passed on to the Tensilica Vision P6 qu...
25 Apr 2019
In this week's Whiteboard Wednesdays video, Craig Johnson explains the purpose of the Cloud Passport Partners Program and how customers can now connect with authorized and knowledgeable service providers t...
29 May 2019
CDNLive EMEA 2017 had several customer experts present innovative products to attendees. In this video, Jens Benndorf from Dream CHIP Technologies presents their latest automotive ADAS chip design, and exp...
30 Apr 2019
In this week’s Whiteboard Wednesdays video, the last in a three-part series, Robert Schweiger closes the loop on the advantages of hybrid sensor fusion platforms in combination with smart sensors. Tensilic...
30 Apr 2019