- Palladium XP Series (61)
- Incisive Enterprise Simulator (49)
- Innovus Implementation System (42)
- Palladium Z1 Series (38)
- Protium Rapid Prototyping Platform (31)
- Tempus Timing Signoff Solution (30)
- Incisive vManager Solution (30)
- Flows SDV (30)
- Quantus QRC Extraction (27)
- Incisive Specman Elite (26)
- Virtuoso Analog Design Environment (25)
- SpeedBridge Adapters (25)
- Virtuoso Layout Suite (24)
- Metric-Driven Verification Signoff (23)
- Sigrity SystemSI (22)
- Power-Aware Verification Methodology (20)
- Virtual System Platform (19)
- Sigrity PowerSI (19)
- Sigrity SPEED2000 (19)
- SimVision (19)
- Palladium Hybrid (19)
- Palladium Dynamic Power Analysis (19)
- Genus Synthesis Solution (18)
- Incisive Functional Safety Simulator (18)
- Voltus IC Power Integrity Solution (18)
- System Development Suite (16)
- Modus Test Solution (15)
- Virtuoso ADE Product Suite (15)
- Virtuoso ADE Explorer (14)
- Virtuoso Schematic Editor (14)
- Virtuoso ADE Assembler (14)
- Allegro Sigrity Power Aware SI Option (14)
- AMS Designer (13)
- Emulation Development Kit (13)
- Sigrity PowerSI 3D EM Full-Wave Extraction Option (13)
- Allegro Sigrity Serial Link Analysis Option (13)
- Virtuoso ADE Verifier (13)
- Virtuoso Liberate MX (13)
- Virtuoso Liberate (13)
- Sigrity SystemSI (12)
- Virtual JTAG Debug Interface (12)
- Allegro Sigrity SI Base (12)
- Allegro Sigrity Package Assessment and Extraction Option (12)
- Perspec System Verifier (12)
- Virtuoso Liberate AMS (12)
- Cadence RocketSim Parallel Simulation Engine (11)
- Allegro Sigrity PI Signoff and Optimiziation (11)
- Indago Debug Platform (11)
- QuickCycles Service (11)
- Conformal Low Power (11)
- Allegro FPGA System Planner (11)
- Accelerated VIP (10)
2,947 Result(s) Found
In addition to providing the tools to design innovative new chips, Cadence offers a wealth of proven, tested intellectual property (IP) that can speed the design cycle for tomorrow’s ADAS chip designs with...
Cadence offers a wealth of proven, tested intellectual property (IP) that can speed the design cycle for tomorrow’s infotainment designs. Our analog, interface, and memory IP are used to quickly add critic...
The automotive industry is working toward autonomous driving vehicles. As a result, future cars will be equipped with sensor clusters, more computing power, car-to-car and in-vehicle communication technolo...
Design high-speed Automotive Ethernet communication links between advanced driver assistance systems (ADAS), Infotainment, cameras, and other electronic control units (ECUs) by leveraging the Cadence Ether...
This webinar provides an introduction to IoT design challenges and the IP and tools which made it possible to take an IoT test chip from RTL to GDS in just 3 months. It also explains the benefits availabl...
12 Jan 2017
In this week's Whiteboard Wednesdays video, the first in a three-part series on Ethernet, Scott Jacobson explores what our world looked like before Ethernet and other networking standards came about. For ...
11 Jan 2017
In this week's Whiteboard Wednesdays video, the last in a 3 part series on automotive functional safety, Charles Qi covers active safety and how Cadence Design IP implements these features.
11 Jan 2017
In this week's Whiteboard Wednesdays video, the second in a three-part series, Charles Qi continues the discussion on automotive functional safety and takes a closer look at the ISO 26262 standard.
11 Jan 2017
In this week's Whiteboard Wednesdays video, the last of a 3-part series, Lana Chan discusses the evolution of PCI Express and the changes associated with PCIe Gen 4.
11 Jan 2017