- System Design and Verification (276)
- Digital Design and Signoff (150)
- Custom IC - Analog - RF Design (149)
- PCB Design and Analysis (133)
- Simulation and Testbench Verification (64)
- Palladium XP Series (63)
- Innovus Implementation System (61)
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- Incisive Enterprise Simulator (50)
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- Tempus Timing Signoff Solution (48)
- Palladium Z1 Series (48)
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- Acceleration and Emulation (41)
- Virtuoso Layout Suite (38)
- PCB Layout (37)
- Circuit Design (36)
- Voltus IC Power Integrity Solution (36)
- Formal and Static Verification (35)
- Protium FPGA-Based Prototyping Platform (35)
- Incisive vManager Solution (34)
- Allegro PCB Designer (33)
- Sigrity SystemSI (32)
- Virtuoso ADE Product Suite (31)
- Genus Synthesis Solution (30)
- Block Implementation (29)
- Virtuoso Analog Design Environment (29)
- Circuit Simulation (29)
- SI PI Analysis Integrated Solution (28)
- Modus Test Solution (28)
- Library Characterization (28)
- SI PI Analysis integrated solution (26)
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- Virtuoso Liberate MX (25)
- Flows SDV (25)
- Sigrity PowerSI (24)
- Synthesis (24)
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3,773 Result(s) Found
Methods2Business explains how a unique SystemC-based design methodology greatly helped them to develop, verify and test a complete family of fully integrated MAC and baseband IPs for the new Wi-Fi standard...
15 Jul 2019
Melexis Time-of-Flight (TOF) automotive 3-D image sensor was analyzed with Cadence® Voltus™-Fi Solution to visualize the electro migration on the power line. The sensor features 320x240 pixels resulting in...
11 Jul 2019
Learn how Ericsson is using Virtual Platforms powered by Cadence to develop software for the base stations that empower our day to day phone calls, as early as possible, well before actual hardware is avai...
11 Jul 2019
Stuart Riches from Arm, gives a short review of the challenges faced in 1999 when the first ASIC revolution began and how it led the way to addressing emerging markets especially in the mobile industry. He...
11 Jul 2019
The Cadence Emulation Development Kit (EDK) is a pre-configured off-the-shelf solution that allows users to validate their systems and co-verify hardware and software in a pre-silicon environment.
NSITEXE Accelerates Delivery of Data Flow Processor IP for Automotive and Industrial Applications Using the Cadence Digital Design Full Flow
Cadence announced that NSITEXE, Inc. deployed the Cadence digital design full flow to accelerate the delivery of its high-efficiency, high-quality data flow processor (DFP) IP for automotive and industrial...
11 Jul 2019
The Cadence Memory Model Portfolio is a pre-validated system-level emulation solution that provides memory device models for the Cadence Palladium series.
Cadence to announce second quarter 2019 financial results via webcast with Lip-Bu Tan, chief executive officer, and John Wall, senior vice president and chief financial officer.
08 Jul 2019
Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence® digital full flow has achieved certification for the Samsung Foundry 5nm Low-Power Early (5LPE) process with Extreme Ultraviole...
02 Jul 2019
Leverage advanced characterization capabilities in Cadence Liberate Trio Characterization Suite like unified flow and multi-PVT flow for faster turn-around time to meet the growing demands for accelerating...
26 Jun 2019