ST Optimizes Verification Across the Globe with the vManager Platform

Narendar Kumar, staff engineer at STMicroelectronics, describes how his team, located at three sites around the globe, optimized their verification process using the Cadence® vManager™ Metric-Driven Signoff Platform

Narendar Kumar describes how to optimize the verifing process using Cadence vManager Metric-Driven Signoff Platform.   http://aemauthor02.cadence.com:4502/damadmin#/content/cadence-www/global/en_US/home/tools/system-design-and-verification/planning-and-management/incisive-vmanager-solution.html.

Last Modified: February 25, 2019