PMC Expert Insights video

Riad Ben Mouhoub, a staff engineer at PMC Sierra, works on a team that develops chips for the enterprise storage market. In his role, he's well acquainted with system-level verification challenges : increasing design size and complexity, time-to-market pressures, and the fact that verification cycles can outweigh design times, to name a few. In this short video, Mouhoub explains how implementing the Cadence® Palladium® XP verification computing platform along with Cadence SpeedBridge® Adapters enabled PMC Sierra to test their DUT with real-world data that can't be modeled on a testbench, achieve bring-up in less than a week with a runtime more than 10,000X faster than a simulation-based approach, and find critical bugs that a pure simulation approach would have missed.

Last Modified: June 15, 2016