2X Productivity Gain Verifying DDR Controller Using Specman/e

An SoC developer needed to speed up the time for verifying the DDR memory controller in its SoC. Mike Bartley, CEO of Test and Verification Solutions, found a faster way to do this by building a testbench with Denali™ memory models and using automated testbench generation via Cadence's Incisive® Enterprise Specman Elite® Testbench. Watch this 3-minute video to hear Mike explain how these tools helped save 50% of the effort on the 4-month project.

Last Modified: November 5, 2018

Duration: 2 min