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Nexus Interposers and Cadence Tools Enhance DDRx Designs
Joe Socha from Nexus is responsible for analyzing tiny PCBs used as interposers between memory devices, target systems. The video talks about how Cadence Sigrity PowerSI tool enables the team to run what-if cases to gain insights that lead to useful changes in trace widths, impedance
Last Modified: August 26, 2015
Duration: 3 min