SAN JOSE, Calif., 31 Oct 2017
Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that Socionext Inc. used the Cadence® Joules™ RTL Power Solution to develop a low power high-efficiency video coding (HEVC) 4K/60p chip. Socionext achieved results for critical blocks in a day (previously it took a month) and for the largest block in just four days, leaving plenty of time for iterations to find the best design to meet power goals.
For more information on the Joules RTL Power Solution, visit www.cadence.com/go/joulesrtl.
Utilizing its high-resolution image processing algorithm and low-power circuit design methodology, Socionext developed its own low-power technology and design flow optimized for CODEC chips. The Joules RTL Power Solution enabled Socionext to reduce development turnaround time, which allowed the design team to estimate RTL-based power much earlier in the design cycle. With the Joules RTL Power Solution, Socionext successfully cut the time required to meet low-power goals of the whole chip from six months to one month.
Getting a quick, accurate measure of RTL power consumption during design exploration has long been a major challenge for chip design teams. The Joules RTL Power Solution delivers RTL power analysis with system-level runtimes and capacity while still providing high-quality estimates of gates and wires. It provides a single power calculator for different levels of design abstraction—RTL, gate level, block level, and total chip. It provides fast, incremental “what-if” power analysis across different frequencies.
“As an industry leader of codec chips for high-end video transmission, it is crucial for Socionext to deliver smaller and cooler chips while shortening time to market. Power management has always been one of the critical challenges to meet our business goals,” stated Tatsushi Otsuka, fellow, Enterprise Solution Business Unit of Socionext. “By using the Cadence Joules RTL Power Solution, we can estimate power consumption quickly in the early design stages, which helped us reduce design iteration loops for power closure, improving our power management schedule by 6X. Given the strong foundation of accuracy with the clock power, we are also expecting the new Joules Ideal Power flow can enable us to analyze the design and uncover opportunities for improvement in the RTL.”
The Joules RTL Power Solution is an integral part of the Cadence digital design platform which supports the company’s overall System Design Enablement strategy, enabling system and semiconductor companies to create complete, differentiated end products more efficiently. From RTL design through implementation and signoff, Cadence’s full-flow digital platform provides a fast path to design closure and better predictability.
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at www.cadence.com.
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