SAN JOSE, Calif., 31 Oct 2016
Cadence Design Systems, Inc. (NASDAQ: CDNS) will host its annual Jasper® User Group (JUG) Conference on November 2 and 3 at the CadenceÒ headquarters in San Jose, Calif. The JUG conference enables designers, verification engineers and engineering managers to learn, share and network with peers and industry experts.
To register for the conference, visit www.cadence.com/jug2016/Pages/default.aspx.
WHAT: The conference offers:
- Two keynote sessions:
- The Formal Verification Book—Past, Present and Future: Presented by Erik Seligman, co-author of “Formal Verification, An Essential Toolkit for Modern VLSI Design”
- Formal Tactics for Formal Services: Presented by Daryl Stewart, distinguished engineer at ARM
- 12 user-authored technical papers addressing all aspects of formal verification
- In-depth details highlighting JasperGold® technology updates
- Demonstrations showcasing the latest formal verification products from Cadence
- Networking opportunities for engaging in thought-provoking discussions with peers
- Best presentation award granted to the presenter with the highest session ratings
To see the full agenda, visit the Cadence events website at
WHEN: The Cadence Jasper User Group Conference is scheduled for November 2-3, 2016.
WHERE: Cadence San Jose headquarters
2655 Seely Avenue, San Jose, Calif.
Building 10 auditorium
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at www.cadence.com.
For more information, please contact:
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