SAN JOSE, Calif., 21 Oct 2015
For more information on the summit, and to register, visit www.cadence.com/news/mixedsignalsummit2015.
Attendees of this free day-long event have the opportunity to learn from Cadence and other industry experts from TSMC, Maxim Integrated, Freescale, MathWorks and UC Berkeley about the latest trends and approaches in mixed-signal design as well as mixed-signal verification, physical implementation and signoff methodologies.
Agenda topics include:
- Foundry perspective on trends driving mixed-signal and low-power design
- Static timing and electromigration/IR drop (EMIR) analysis and signoff for mixed-signal systems-on-chip (SoCs)
- Analog Verification IP: Universal Verification Methodology-Mixed Signal (UVM-MS) component to drive and monitor analog signals
- Model-based verification of mixed-signal SoCs
- Digitally controlled analog
The Mixed-Signal Technology Summit is scheduled from 8:15 a.m. to 6:15 p.m. on October 27, 2015.
Cadence Design Systems, Building 10 Auditorium
2655 Seely Avenue
San Jose, CA 95134
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence® software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at www.cadence.com.
For more information, please contact: