SAN JOSE, Calif., 18 Jan 2015
With the Palladium XP platform, and models for peripherals such as DDR3 DFI (DDR PHY Interface) and SD (secure digital) interface, DMP was able to start system emulation early to allow design exploration and pre-silicon system validation with Linux boot and GPU driver optimization.
"The Palladium XP platform allowed our design team to explore different design options with actual test patterns to select the optimum combination of performance and power," said Eisaku Ohbuchi, director and general manager of core technology development at DMP. "Additionally, the modeling capabilities of the Palladium XP platform reduced the normal man hours required for this task by two thirds."
Part of the Cadence System Development Suite, the Palladium XP platform is the industry's first high-performance, special-purpose verification computing platform that unifies best-in-class simulation acceleration and emulation capabilities in a single environment. For more information on the Palladium XP platform, visit www.cadence.com/news/pxp.
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
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