Attend the 2018 International Conference on VLSI Design (VLSI) and International Conference on Embedded Systems (ES) and learn more from international experts on various embedded systems and VLSI design topics.
As part of the conference, Cadence will host the Tensilica® Hackathon, where teams will compete in designing an optimized Tensilica DSP for face detection using Xtensa® tools. This competition will be held a few days before the conference on January 6 and 7, 2018. All reference software and design tools will be provided by Cadence, and Tensilica experts will be available to help. Winners will receive exciting cash prizes.
REGISTER NOW! The Tensilica hackathon is limited to 15 teams!