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 Error during net extraction from Allegro PCB SI GXL to SigXplorer PCB SI GXL 

Last post Tue, Aug 7 2012 11:06 PM by mxlecanu. 5 replies.
Started by mxlecanu 07 Aug 2012 06:16 AM. Topic has 5 replies and 2208 views
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  • Tue, Aug 7 2012 6:16 AM

    • mxlecanu
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    • Joined on Mon, Apr 16 2012
    • Posts 6
    • Points 90
    Error during net extraction from Allegro PCB SI GXL to SigXplorer PCB SI GXL Reply

    Hi,

    I get the following error when trying to extract sone differential nets to sigxplorer, in order to perform Signal Integrity simulation :

    Field solution failed for STL_1S_1R_180383
    Field solution failed for STL_1S_1R_180382
    Field solution failed for MTL_2S_6R_180381

    The process ends anyway, but in SigXplorer, I have some uncalculated impedances for some striplines (coupled or single).

    What is strange is that I extracted some other differential pairs perfectly (in the same layer or not). I did that many times and this is the very first time I see this error...

    Did anyone ever see this problem, and would like to share his solution ?

    I work on Cadence 16.5

    Thank you so much !!!

    Regards,

    Maxime

    • Post Points: 20
  • Tue, Aug 7 2012 7:39 AM

    • Ejlersen
    • Top 10 Contributor
    • Joined on Mon, Jul 28 2008
    • Aalborg, Copenhagen
    • Posts 556
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    Re: Error during net extraction from Allegro PCB SI GXL to SigXplorer PCB SI GXL Reply

    Hi Maxime

    Try the following

    1. start PCB SI in safe mode by running "allegro -sq -safe" and see if that works, it will disable any customization

    2. try renaming the following environment variables "allegro_pcbenv" and "cds_site" and try again, if it works, then it is something inside your local customization. If you do not have an allegro_pcb env env variable, then look for a pcbenv directory inside your HOME path. rename that directory and see what happens. if it does not change a thing rename back to the existing pcbenv directory 

     

    Best regards

    Ole 

    Best regards Ole
    • Post Points: 20
  • Tue, Aug 7 2012 8:28 AM

    • mxlecanu
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    • Joined on Mon, Apr 16 2012
    • Posts 6
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    Re: Error during net extraction from Allegro PCB SI GXL to SigXplorer PCB SI GXL Reply

    Hi Ole,

    Thank you very much for your help. Unfortunately, none of the solutions did solve the problem...

    I tried both to start in safe mode, and to rename the pcbenv directory, but without any improvement.

     

    Just in case these information would be useful, I'm working on Windows 7 professionnal x64, with a server version of the Cadence Suite (the pcbenv folder was located at C:\SPB_DATA).

     

    Best regards,

    Maxime

    • Post Points: 20
  • Tue, Aug 7 2012 8:37 AM

    • Ejlersen
    • Top 10 Contributor
    • Joined on Mon, Jul 28 2008
    • Aalborg, Copenhagen
    • Posts 556
    • Points 9,795
    Re: Error during net extraction from Allegro PCB SI GXL to SigXplorer PCB SI GXL Reply

    Hi Maxime

    What does help about tell you? I'm on 16.5s026 - maybe you're running an older version.

    Are you able to extract any nets from that board? If not, it could be a path or design name issue, maybe a question of where you temp/tmp directories are located

    you can type set at the command line, save the result and post it here for debugging of paths. 

     

    Best regards

    Ole 

    Best regards Ole
    • Post Points: 20
  • Tue, Aug 7 2012 8:53 AM

    • mxlecanu
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    • Joined on Mon, Apr 16 2012
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    • Points 90
    Re: Error during net extraction from Allegro PCB SI GXL to SigXplorer PCB SI GXL Reply

    The exact version is 16.5s013. I don't know if there is any bug correction between our version which could explain the difference.

    Actually, the extraction process works fine for some other differential pairs on the board. And considering the ones which generates errors, SigXplorer returns the complete transmission line anyway, but the impedance is not calculated for all the segments of the nets.

    It looks like it is more a design setup issue, am I wrong ? Actually the company I work for (as an intern) has a PCB routing team, but they don't perform any simulation. These are made by the engineering team afterwords. So maybe the routing team did miss some parameters for some nets which could explain the problem...?

    Might it be linked to a bad model assignment, stackup setup or anything like this ?

    As the "set" command returns many things linked to the company servers and licenses locations, I'm not sure I'm allowed to post it... But as the extraction process works for sone nets, I think that all the paths are well defined (automatic installer, specially designed for the company).

     

     Thanks again,

    Maxime

    • Post Points: 5
  • Tue, Aug 7 2012 11:06 PM

    • mxlecanu
    • Not Ranked
    • Joined on Mon, Apr 16 2012
    • Posts 6
    • Points 90
    Re: Error during net extraction from Allegro PCB SI GXL to SigXplorer PCB SI GXL Answer Reply

    Problem solved !

    It was the EMS2D parameters setting which caused the error. Actually, I did set the simulation duration to a fixed value (in Allegro), because of other required simulations. I tried to set it back to an automatic duration and the impedane calculation now works fine.

    Thank you very much Ole for having spent some time trying to help me.

     

    Best regards,

    Maxime

    • Post Points: 5
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Started by mxlecanu at 07 Aug 2012 06:16 AM. Topic has 5 replies.