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Signoff Timing Analysis with Encounter Timing System v13.1

返回課程目錄
課程安排
上課地點課程起訖日課程天數上課時間限制人數報名狀態
新竹2013/11/26 - 11/261天09:30~17:3030人截止

課程種類Digital IC design catalog; Digital IC design catalog
產品版本v13.1
價格NT$5000/per-day
Course Description

This course is a detailed exploration of the timing and signal integrity analysis capabilities of Encounter® Timing System (TS). You analyze a design for static timing, and signal integrity issues that are inherent in advanced process nodes with feature sizes 90 nm and below.

Learning Objectives

After completing this course, you will be able to:

  • Analyze a design for basic static timing
  • Generate timing reports
  • Debug timing issues using several techniques
  • Generate ECO files for place and route
  • Analyze a design for signal integrity issues
  • Generate signal integrity (SI) noise reports
  • Analyze designs with multiple functional modes and delay corners
  • Analyze designs using Signoff ECO analysis to simplify timing signoff procedure on large timing critical designs
  • Apply multimode multicorner signoff ECO analysis on a simple test case

Software Used in This Course

  • Encounter® Timing System

Software Release(s)

  • ETS131

Course Agenda

Note that this course can be tailored to better meet your needscontact the Cadence training staff for specifics.

Section 1

  • Introduction to Encounter TS
  • Timing debug
  • Timing analysis labs
  • Crosstalk and signal integrity analysis
  • Crosstalk analysis labs

Section 2

  • Multimode Multicorner Analysis
  • MMMC Default Flow
  • MSMV Requirements
  • Multimode Multicorner Signoff ECO Analysis
  • Hierarchical Flow
  • EDI-ETS Correlation
  • MMMC labs
  • Advanced Analysis

Audience

  • CAD Engineers
  • Chip Designers
  • Design Engineers
  • Digital IC Designers
  • IC Designers
  • Place and Route Designers

Prerequisites

You must have experience with or knowledge of the following:

  • Cadence physical design tools

Or you must have completed the following courses:

  • Basic Static Timing Analysis

Related Courses

  • Basic Static Timing Analysis
  • Encounter RTL Compiler
  • Encounter Digital Implementation (Flat)

Click here to view course learning maps, and here for complete course catalogs.