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Cadence Ultra High-Speed (40/100G) Ethernet IP Solutions 

Silicon-proven and scalable
Cadence has an exceptional reputation for Ethernet IP domain knowledge and design implementation, as well as a proven record of designing, delivering, and supporting high-quality Ethernet IP. Cadence Ultra High-Speed (40/100G) Ethernet IP solutions have been designed and verified using the same team, tools, and methodologies as deployed in its silicon-proven 10/100/1000M and 10/40G solutions.

Cadence Ethernet MAC and PCS IP has been widely licensed with multiple customer tapeouts for high-volume production. Cadence PCS IP has a clear demarcation from the SerDes. The SerDes and PCS are integrated as the PHY layer on the same chip but may be sourced from separate suppliers.

World-class quality, early availability
Cadence is consistently the first supplier on the market to offer IP for the newest, most advanced Ethernet standards with key capabilities for maximum performance and functionality. As an IEEE 802.3 voting member and an active participant in the standards community, we have early visibility into Ethernet requirements. Our IP solutions go beyond the latest 802.3 specification while also reliably conforming to the latest standards, thereby giving customers the highest confidence in their Ethernet implementations.

Cadence Design IP for Ultra High-Speed (40/100G) Ethernet Technical Brief »

Cadence Ultra High-Speed (40/100G) Ethernet IP solutions consist of the following products:
40/100G Ethernet MAC [CGM]
  • 100G Ethernet media independent interface (CGMII) with PHY layer, along with backward support for 40G Ethernet, in compliance with 802.3ba-2010 Clause 81
  • Compliant with 802.3-2008 for frame-based flow control mechanisms in FDX media, including transmission of self-assembled control frames and response to the received pause control packet
  • Compliant with P802.3bd/D1.0 for priority-based flow control mechanisms, including transmission of self-assembled PFC packets and response to the received PFC packets
  • Support for 802.3az Energy-Efficient Ethernet


40GBASE-R PCS [PCSXL]
  • 40G Ethernet PCS between 40G MAC [XGM] and four 10G SerDes modules with a 16-bit or 32-bit interface
  • 40G Ethernet media independent interface (XLGMII) with PHY layer
10/40/100GBASE-R PCS [PCSCG]
  • 100GBASE-R PCS with 128-bit CGMII interface to 100G Ethernet MAC [CGM) and ten 10G SerDes interfaces or four 25G SerDes interfaces
Backplane Ethernet Auto-Negotiation [BEAN]
  • Implements auto-negotiation function compatible with 802.3ap Clause 73
  • Connects to 10/20-bit or 16/32-bit SerDes interface
  • Support for interrupt generation to signal completion of auto-negotiation and receipt of new pages
Ethernet IP Standards
Cadence actively participates in IEEE 802.3 standards meetings, hosts 802.3 working groups, and serves as an editor of the 802.3ah, 802.3ap, and 802.3ba standards. Our efforts have influenced the creation and support of Ethernet standards including 802.1AS for timing and synchronization, 802.1 priority queuing for audio/video bridging, and 802.3az Energy-Efficient Ethernet for low-power applications.