Allegro IC-PKG-PCB co-design
Cadence Kits
Incisive functional verification
Encounter digital IC design
Virtuoso custom design
Allegro IC-PKG-PCB co-design
PRODUCTS
Allegro AMS Simulator
Allegro Design Entry CIS
Allegro Design Entry HDL
Allegro System Architect
Allegro Design Publisher
Allegro PCB Design
Allegro PCB SI
Allegro PCB Librarian
Allegro Design Workbench
Allegro Package Designer
Allegro Package SI
Cadence 3D Design Viewer
DESIGN TASKS
Design creation
Simulation
PCB layout and routing
PCB signal integrity
Library and design data management
IC package co-design
Silicon design-in
OrCAD PCB design
System-in-package design
Design for manufacturing
IP catalog
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Allegro system interconnect design platform
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The Cadence Allegro IC-Package-PCB co-design platform optimizes the system interconnect, reduces costs, and accelerates time to market by enabling a constraint-driven, collaborative design across all three system domains.
The system interconnect is the logical, physical, and electrical connection of a signal, its associated return path, and the power delivery system. Design teams face unprecedented challenges in designing the system interconnect of today's complex designs. With the growing integration of ICs, chip I/Os and package pin counts are rapidly increasing. Gigahertz-speed data rates also translate into blisteringly fast PCBs and systems. At the same time, the average PCB size is decreasing and power delivery requirements are heating up as chip transistor counts skyrocket.

The need to solve these complex problems and deal with increasing time-to-market pressures makes the traditional approach—designing systems components in isolation—obsolete. Achieving working system interconnect in complex systems requires a new approach, one that allows design teams to focus on achieving efficiencies in the system interconnect spanning all three system domains.

Using the platform's co-design methodology, engineers can quickly optimize the system interconnect—between I/O buffers and across ICs, packages, and PCBs—eliminating hardware re-spins and reducing both hardware costs and design cycles. The constraint-driven Allegro flow includes advanced capabilities for design capture, signal integrity, and physical PCB design.

From designs for high-speed, high-performance products to commodity markets, Cadence provides easy integration with existing technology, allowing you to incrementally enhance your existing design flow with updates and best-of-breed technology to support all market sectors. And because it is supported by the Cadence Encounter and Virtuoso platforms, the Allegro co-design methodology enables effective design chain collaboration.

Visit the Cadence Designer Network User Community for user contributed technical articles, product reviews, and interactive forums. Visit www.cdnusers.org.

An integrated technology platform supports the VSIC model, IP availability, and silicon design-in technology
An integrated technology platform supports the VSIC model, IP availability, and silicon design-in technology


Webinar Series for Custom IC Designers
What's new

Press release
Cadence Revolutionizes Productivity For Next-Generation PCB Design with New Allegro Platform

On the Cadence Designer Network user community
An Interview with Michael Umina, Cisco Systems, on the Allegro PCB Global Routing Environment Technology

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