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C-to-Silicon Compiler 

Next-generation high-level synthesis for design and verification

With C-to-Silicon Compiler, engineers can take their designs from a high level of abstraction through an integrated implementation and verification flow to a final, verified SoC that meets product requirements.

C-to-Silicon Compiler Datasheet »
17 resources found
 
Title Type Rated
Technical University of Braunschweig and Cadence Success Story
Format: .PDF    Date: 07 Dec 2011
 		Success Story
 1
Recommend!
TLM-Driven Design and Verification – Time for a Methodology Shift White Paper
Format: .PDF    Date: 02 Dec 2011
 		White Paper
 2
Recommend!
Cadence and Casio Success Story
Format: .PDF (2MB)    Date: 30 Nov 2011
 		Success Story
 1
Recommend!
Archived webinar - Magillem: Role of IP-XACT in TLM
Date: 15 Dec 2010
 		Webinar
 0
Recommend!
Practical application of high-level synthesis in SoC designs on-demand webinar
Date: 08 Dec 2010
 		Webinar
 2
Recommend!
Case study: High-Level Synthesis – Ready for prime-time?
Date: 23 Nov 2010
 		Article
 1
Recommend!
Archived webinar - TSMC Reference Flow 11: ESL Focus on High-Level Synthesis
Date: 03 Nov 2010
 		Webinar
 0
Recommend!
Archived webinar - TSMC Reference Flow 11: ESL Focus on TLM Design and Verification Methodology
Date: 06 Oct 2010
 		Webinar
 0
Recommend!
Archived webinar - Calypto: Application of Sequential Analysis for ESL Methodology Adoption
Date: 29 Sep 2010
 		Webinar
 0
Recommend!
Archived webinar - CircuitSutra: Role of Standards in TLM Driven Design and Verification Methodology
Date: 15 Sep 2010
 		Webinar
 0
Recommend!
Archived webinar - XtremeEDA: The Importance of a Complete Methodology for ESL
Date: 08 Sep 2010
 		Webinar
 0
Recommend!
TLM-Driven Design and Verification Methodology Book
Date: 01 Jul 2010
 		Book
 1
Recommend!
Archived webinar - TLM-Driven Design and Verification Solution and Methodology
Date: 14 May 2010
 		Webinar
 0
Recommend!
Cadence and Renesas System Design and Verification Success Story
Format: .PDF    Date: 09 Jun 2009
 		Success Story
 7
Recommend!
Next-generation High Level Synthesis: Cadence C-to-Silicon Compiler Demo
Date: 16 Mar 2009
 		Demo
 5
Recommend!
Cadence C-to-Silicon Compiler Datasheet
Format: .PDF    Date: 14 Jul 2008
 		Datasheet
 2
Recommend!
Cadence C-to-Silicon Compiler Delivers on the Promise of High-Level Synthesis Technical Paper
Format: .PDF    Date: 14 Jul 2008
 		Technical Paper
 42
Recommend!
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