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Cadence Palladium XP Series 


The Cadence® Palladium® XP series offers unmatched capabilities for simulation, acceleration, and emulation, making it the industry’s most advanced verification computing platform. Using the platform, you can achieve early hardware/software co-verification and benefit from flexible support for hard/soft intellectual property (IP) modeling.

Building on the strengths of the widely adopted Palladium XP platform, the latest generation Palladium XP II platform extends the capacity envelope to 2.3 billion gates while delivering up to 50 percent performance improvement for system-on-chip (SoC) verification. It increases verification throughput via faster upload speeds and improved debug, while preserving best-in-class simulation acceleration and emulation capabilities in a single platform. With the new platform, you can achieve faster post-silicon bring-up.
Palladium XP II Technical Brief  |   Palladium XP Technical Brief
Palladium XP Demos (Preview) | Palladium XP Demos (Full Version)
In-Circuit Acceleration Demo (Preview) | In-Circuit Acceleration Demo (Full Version)
UVM-Acceleration, Assertions and Coverage Demo (Preview)
UVM-Acceleration, Assertions and Coverage Demo (Full Version)
Industry’s First Verification Computing Platform – Palladium XP Series
With the Palladium XP series, you can gain a level of design and verification performance and scalability not previously available. See how NVIDIA and Zenverge stay ahead of the game with the Palladium XP Series. Hear Gary Smith on the system-level verification industry and Cadence's continued market-leading position. And watch how the Palladium XP platform accelerates Nethra Imaging's system-level verification. View the videos »

129 resources found
 
Title Type Rated
Automating Root-Cause Analysis to Reduce Time to Find Bugs by Up to 50% White Paper
Format: .PDF (2.1MB)    Date: 28 Apr 2015
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Embedded Software Debug App Datasheet
Format: .PDF    Date: 28 Apr 2015
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Meeting Functional Safety Requirements Efficiently Via Electronic Design Tools and Techniques White Paper
Format: .PDF    Date: 20 Apr 2015
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 2
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Cadence SpeedBridge Adapter for USB 2.0 Host Datasheet
Format: .PDF    Date: 24 Mar 2015
Datasheet
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Cadence and Freescale Semiconductor Success Story
Format: .PDF    Date: 12 Mar 2015
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 2
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Stratus High-Level Synthesis Datasheet
Format: .PDF    Date: 24 Feb 2015
Datasheet
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How the Productivity Advantages of High-Level Synthesis Can Improve IP Design, Verification, and Reuse White Paper
Format: .PDF    Date: 24 Feb 2015
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Perspec System Verifier Datasheet
Format: .PDF (1.3MB)    Date: 11 Dec 2014
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Cadence SpeedBridge Adapter for Serial ATA (SATA) Datasheet
Format: .PDF    Date: 01 Dec 2014
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SpeedBridge Adapter for USB 3.0 Devices Datasheet
Format: .PDF    Date: 25 Sep 2014
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 2
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Protium Rapid Prototyping Platform Datasheet
Format: .PDF    Date: 17 Jul 2014
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 6
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Cynthesizer Solution
Format: .PDF    Date: 21 May 2014
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Cadence SpeedBridge Adapter for Ethernet Datasheet
Format: .PDF    Date: 14 Mar 2014
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 7
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Cadence C-to-Silicon Compiler Datasheet
Format: .PDF    Date: 14 Dec 2013
Datasheet
 8
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Metric-Driven Mixed-Signal Verification Flow Datasheet
Format: .PDF    Date: 10 Oct 2013
Datasheet
 4
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Cadence Palladium XP II Verification Computing Platform Technical Brief
Format: .PDF (1MB)    Date: 09 Sep 2013
Technical Brief
 3
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Productivity, Predictability, and Use-Model Versatility: The Three Key "Care-Abouts" of Choosing Hardware-Assisted Verification White Paper
Format: .PDF    Date: 09 Sep 2013
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 1
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Cadence and STMicroelectronics Success Story
Format: .PDF    Date: 14 May 2013
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Moving to SystemC TLM for Design and Verification of Digital Hardware
Date: 13 May 2013
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Cadence Accelerated Verification IP for PCI Express Datasheet
Format: .PDF    Date: 10 May 2013
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