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Cadence Palladium XP Series 


The Cadence® Palladium® XP series offers unmatched capabilities for simulation, acceleration, and emulation, making it the industry’s most advanced verification computing platform. Using the platform, you can achieve early hardware/software co-verification and benefit from flexible support for hard/soft intellectual property (IP) modeling.

Building on the strengths of the widely adopted Palladium XP platform, the latest generation Palladium XP II platform extends the capacity envelope to 2.3 billion gates while delivering up to 50 percent performance improvement for system-on-chip (SoC) verification. It increases verification throughput via faster upload speeds and improved debug, while preserving best-in-class simulation acceleration and emulation capabilities in a single platform. With the new platform, you can achieve faster post-silicon bring-up.
Palladium XP II Technical Brief  |   Palladium XP Technical Brief
Palladium XP Demos (Preview) | Palladium XP Demos (Full Version)
In-Circuit Acceleration Demo (Preview) | In-Circuit Acceleration Demo (Full Version)
UVM-Acceleration, Assertions and Coverage Demo (Preview)
UVM-Acceleration, Assertions and Coverage Demo (Full Version)
Industry’s First Verification Computing Platform – Palladium XP Series
With the Palladium XP series, you can gain a level of design and verification performance and scalability not previously available. See how NVIDIA and Zenverge stay ahead of the game with the Palladium XP Series. Hear Gary Smith on the system-level verification industry and Cadence's continued market-leading position. And watch how the Palladium XP platform accelerates Nethra Imaging's system-level verification. View the videos »


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State-of-the-Art, Hardware-Assisted Verification Computing Platform
Using the Palladium XP series, your design team can perform more verification and validation tasks to help improve overall time to market and product quality. With its hot-swap technology, the Palladium XP series delivers unparalleled productivity as you can smoothly transition among simulation, simulation acceleration, and emulation environments at runtime without re-compilation.

The Palladium XP series combines two proven technologies (Palladium emulation and Cadence Incisive® Xtreme® acceleration) to deliver the best of both worlds. It transcends traditional emulation by offering flexible new simulation-like use models that were traditionally impractical. By integrating with Cadence Incisive Verification Manager, the Palladium XP series supports a metric-driven flow that accelerates verification. Incisive Verification Manager automates and manages the execution of regressions on an accelerated verification computing platform. You’ll be able to use a common verification plan and extract constraint results from multiple locations into a common database for signoff analysis.

The Palladium XP series combines its processor-based compute engine and Unified Xccelerator Emulator (UXE) software to offer fast and predictable compiles. The platform runs high-performance verification applications and enables flexible new use models that transcend traditional emulation. The Palladium XP series optimizes system design and verification by delivering:
  • Unmatched scalability
  • Advanced debug and coverage
  • Hardware/software co-verification
  • Support for Dynamic Power Analysis (DPA), hard and soft IP, and metric-driven verification
Because it is scalable, this series is suitable for both design teams and enterprise-wide customers, tackling system-level verification challenges while increasing users’ confidence in delivering high-quality products on schedule. The platform also enables reuse of abstracted models such as C/C++, transaction-level models (TLMs), behavioral register-transfer level (RTL), RTL/gate-level netlist, silicon/FPGA/software IP, and system-level interfaces.

The Palladium XP series can also be extended for system-level power analysis and power verification. With DPA, the platform delivers an improved methodology for power budgeting by allowing you to quickly identify peak and average power of SoCs with “deep” software cycles without compromising throughput. The low-power methodology equips you to specify your power intent upfront in your design.

As a part of the System Development Suite, the Palladium XP series provides two new use models: hybrid technology with virtual prototypes and embedded testbenches. The patent-pending hybrid technology combines the Cadence Virtual System Platform with the Palladium XP series to deliver up to 60X speed-up for embedded OS verification and 10X performance speed-up for hardware/software verification. The embedded testbench for advanced virtualization of system environments lets you verify peripheral software drivers before tapeout, so you can benefit from faster post-silicon bring-up.

Extensive Emulation and Acceleration VIP Portfolio
The Palladium XP series offers an extensive portfolio of emulation and acceleration VIP for both acceleration and emulation use models with Cadence Accelerated VIP and Cadence SpeedBridge® Adapters, respectively. To deliver high-performance verification performance, Cadence Accelerated VIP takes full advantage of the Palladium XP acceleration technology, so you can achieve verification speeds that are orders of magnitude faster than simulation. Accelerated VIP offers the flexibility to address the verification challenges for IP/block-level, subsystem-level, and SoC-level verification.

For system-level validation, the Palladium XP series and SpeedBridge Adapters give design teams the means to rapidly construct a complete emulation environment that applies real-world system operating conditions to the design. The adapters interface the design seamlessly to external systems, networks, and test equipment, allowing design teams to emulate the design with real application requirements, such as booting the operating system, transferring files, and displaying graphics and video. Off-the-shelf, programmable plug-and-play products, the SpeedBridge Adapters support industry-standard protocol interfaces that are widely used in wireless, networking, storage, and multimedia applications.

Palladium XP Series Benefits
  • Unparalleled operational efficiency and user flexibility with highly scalable systems
    • Delivers high performance up to 4MHz
    • Allows flexible configurations from 4.5 million gates to 2.3 billion gates
    • Supports up to 512 users simultaneously
    • Provides fast compile of up to 75MG/hr on a single workstation
  • Advanced compiler, predictable runtime, and debug capabilities
    • Features built-in Xccelerator Emulator (UXE) compiler with predictable runtime
    • Integrates seamlessly with Incisive products with hot-swap capability
    • Supports SCE-MI and SystemVerilog DPI for third-party models/tools integration
    • Supports in-circuit acceleration for both static and dynamic environments
    • Offers a unified, advanced debug environment for hardware/software co-verification
    • Offers superior debug capabilities with SDL trigger, FullVision, dynamic probes, and Infinitrace
  • Unique versatility with platform extensions

 

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