Co-verify hardware and software in the system contextPerforming both high-speed hardware verification and hardware/software co-verification, Incisive Enterprise Simulator with ESL Option simulates system-level behavior to reduce risk. Incisive Software Extensions Datasheet » |
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Cadence® Incisive® Enterprise Simulator with ESL Option performs high-speed hardware verification using system-level transaction-based acceleration (TBA), substantially increasing overall throughput versus RTL simulation. The ESL Option also co-verifies hardware/software using Incisive Software Extensions that give the testbench access to the software executing on processor models in any form. Incisive Software Extensions expand the advanced verification techniques that have been applied to the hardware into the hardware/software interface. Using the SimVision debugger, the verification team can control and verify system-level behavior, such as software processes, function calls, and variables, together with processor and register behavior.
Features/Benefits
- Achieves high simulation performance via a high throughput channel between the testbench and the design
- Boosts simulation speed by 100x to 1,000x when using TBA in conjunction with Incisive Palladium® and Incisive Xtreme® accelerators/emulators
- Supports processor models in any form (workstation-based host-code execution, Instruction Set Simulators (ISS), RTL models, hardware acceleration and emulation, and prototype silicon)
- Offers high level of reuse—RTL acceleration uses the same SystemC® transaction-level models (TLMs) used for system-level design and as reference models for RTL development
- Expands constraint-driven stimulus generation with metric-driven verification of hardware/software
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