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Cynthesizer Solution 

Cynthesizer tool automatically creates high-quality RTL design implementations for ASIC, system-on-chip (SoC), and FPGA targets from a high-level SystemC/C++ description. Proven successes in hundreds of production designs around the world are testament to its consistently high quality of results, mature feature set, and complete design coverage. The world’s largest systems and semiconductor companies use Cynthesizer tool for production designs every day.

Cynthesizer Solution Datasheet »

World-class productivity and QoR
  • Production-quality RTL
  • Cutting-edge datapath optimization
  • 2.0M gates/designer/year
  • Effective IP reuse
  • Easy retargeting of datapath and control-dominated designs
  • Rapid design exploration
Low-power design
  • Clock gating optimizations during HLS
  • FSM optimizations minimize mux select switching
  • ½- and ¼-speed memory architectures
  • Disables memories when not in use
  • Clock-domain crossing circuitry
High level of abstraction
  • Compact coding style
  • Untimed C++ behavior
  • Explicit concurrency and structural models
  • Built-in interface generator and IP
  • Custom interfaces written in SystemC
Early, accurate verification of complex designs
  • Transaction- and pin-level simulation support
  • Reusable testbench for SystemC and RTL


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