Home > Tools > RF Design > Cadence Physical Verification System


* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Company Location *

Comments: *

Cadence Physical Verification System 

In-design and back-end physical verification for faster final signoff

Physical Verification System is the premier Cadence signoff solution enabling in-design and back-end physical verification, constraint validation, and reliability checking.

Cadence Physical Verification System Datasheet »

Product ImageCadence Physical Verification System (PVS) integrates with industry-standard Cadence Virtuoso® custom/mixed-signal and Cadence Encounter® digital design flows. This provides designers with an end-to-end design and signoff solution from a single vendor.

PVS is a trusted solution that enables users to achieve advanced node design signoff in a quick total turnaround time. It provides efficient, effective debug tools to reduce debug time and increase productivity. This solution supports advanced process node technology (such as double patterning, 3D-IC, and advanced device extraction), and it extends physical verification technology into design reliability checking and constraint validation. PVS also offers a distributed multi-threading processing capability that greatly accelerates throughput without requiring specialized hardware.

  • Trusted solution with production-proven accuracy
  • Single-vendor solution for implementation and pre-tapeout signoff
  • Quick turnaround time from design to signoff through integration with Virtuoso and Encounter design flows
  • Innovative technology to support advanced process node design
  • Reduced debug time with powerful and intuitive debugging tools
  • Simplified migration through compatibility with industry-standard formats
  • Cost-effective parallel computing systems, eliminating the need for hardware modifications