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RF Design 

Press Releases
TSMC Selects Cadence Virtuoso and Encounter Platforms for its 20nm Design Infrastructure, Spanning Custom/Analog, Digital and Mixed-Signal Design
Cadence Virtuoso IC 6.1 Successfully Deployed by Matsushita for Analog and Mixed-Signal SoC Designs
Renesas Adopts Cadence Virtuoso Spectre Circuit Simulator with Turbo Technology

Articles
Heard at DAC: the Question on Everyone’s Mind
EDA360: My Modest Opinion
Toward a standard deep sub-micron analog design flow: Cadence enhances the Virtuoso Platform

Events
CDNLive Korea 2016
07/13/2016 - Seoul
CDNLive Japan 2016
07/15/2016 - The Yokohama Bay Hotel Tokyu
CDNLive Taiwan 2016
08/16/2016 - Hsinchu

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